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參數(shù)資料
| 型號： | TMS28F512A-15 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GT 16C 2#12 14#16 SKT PLUG |
| 中文描述： | 65536 8位快閃記憶體 |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 311K |
| 代理商： | TMS28F512A-15 |
TMS28F512A
65536 BY 8-BIT
FLASH MEMORY
SMJS514C – FEBRUARY 1994 – REVISED AUGUST 1997
9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Fastwrite algorithm
The TMS28F512A is programmed using the Texas Instruments fastwrite-algorithm previously shown in
Figure 1. This algorithm programs in a nominal time of two seconds.
Fasterase algorithm
The TMS28F512A is erased using the Texas Instruments fasterase-algorithm shown in Figure 2. The memory
array needs to be completely programmed (using the Fastwrite algorithm) before erasure begins. Erasure
typically occurs in one second.
parallel erasure
To reduce total erase time, several devices can be erased in parallel. Since each Flash memory can erase at
a different rate, every device must be verified separately after each erase pulse. After a given device has been
successfully erased, the erase command should not be issued to this device again. All devices that complete
erasure should be masked until the parallel erasure process is finished as shown in Figure 3.
Examples of how to mask a device during parallel erase include driving the E pin high, writing the read command
(00h) to the device when the others receive a set-up-erase or erase command, or disconnecting it from all
electrical signals with relays or other types of switches.
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