參數(shù)資料
型號(hào): TMS320C6211JA150
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 定點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù): 101/123頁
文件大小: 1205K
代理商: TMS320C6211JA150
www.ti.com
ADCSOCAO
or
ADCSOCBO
t
w(ADCSOCAL)
6.9.3
External Interrupt Timing
XNMI, XINT1, XINT2
t
w(INT)
Interrupt Vector
t
d(INT)
Address bus
(internal)
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 6-27. eQEP Switching Characteristics
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
cycles
cycles
t
d(CNTR)xin
t
d(PXCSOUT)QEP
Delay time, external clock to counter increment
Delay time, QEP input edge to position compare sync output
4t
c(SCO)
6t
c(SCO)
Table 6-28. External ADC Start-of-Conversion Switching Characteristics
PARAMETER
Pulse duration, ADCSOCAO low
MIN
MAX
UNIT
cycles
t
w(ADCSOCAL)
32t
c(HCO)
Figure 6-15. ADCSOCAO or ADCSOCBO Timing
Figure 6-16. External Interrupt Timing
Table 6-29. External Interrupt Timing Requirements
(1)
TEST CONDITIONS
Synchronous
With qualifier
MIN
MAX
UNIT
cycles
cycles
t
w(INT)
Pulse duration, INT input low/high
1t
c(SCO)
1t
c(SCO)
+ t
w(IQSW)
(1)
For an explanation of the input qualifier parameters, see
Table 6-13
.
Table 6-30. External Interrupt Switching Characteristics
(1)
PARAMETER
MIN
MAX
UNIT
cycles
t
d(INT)
Delay time, INT low/high to interrupt-vector fetch
t
w(IQSW)
+ 12t
c(SCO)
(1)
For an explanation of the input qualifier parameters, see
Table 6-13
.
Electrical Specifications
101
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