參數(shù)資料
型號： TMS320C6211N100
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 定點(diǎn)數(shù)字信號處理器
文件頁數(shù)： 21/123頁
文件大小： 1205K
代理商： TMS320C6211N100
www.ti.com
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 2-2. Signal Descriptions (continued)
PIN NO.
NAME
DESCRIPTION
(1)
PZ PIN
#
GGM
BALL #
GPIO24
ECAP1
EQEP2A
SPISIMOB
GPIO25
ECAP2
EQEP2B
SPISOMIB
GPIO26
ECAP3
EQEP2I
SPICLKB
GPIO27
ECAP4
EQEP2S
SPISTEB
GPIO28
SCIRXDA
-
TZ5
GPIO29
SCITXDA
-
TZ6
GPIO30
CANRXA
-
-
GPIO31
CANTXA
-
-
GPIO32
SDAA
EPWMSYNCI
ADCSOCAO
GPIO33
SCLA
EPWMSYNCO
ADCSOCBO
GPIO34
-
-
-
General purpose input/output 24 (I/O/Z)
(4)
Enhanced capture 1 (I/O)
Enhanced QEP2 input A (I) (not available on F2801/9501)
SPI-B slave in, master out (I/O)
General purpose input/output 25 (I/O/Z)
(4)
Enhanced capture 2 (I/O)
Enhanced QEP2 input B (I) (not available on F2801/9501)
SPI-B master in, slave out (I/O)
General purpose input/output 26 (I/O/Z)
(4)
Enhanced capture 3 (I/O) (not available on F2801/9501)
Enhanced QEP2 index (I/O) (not available on F2801/9501)
SPI-B clock (I/O)
General purpose input/output 27 (I/O/Z)
(4)
Enhanced capture 4 (I/O) (not available on F2801/9501)
Enhanced QEP2 strobe (I/O) (not available on F2801)
SPI-B slave transmit enable (I/O)
General purpose input/output 28. This pin has an 8-mA (typical) output buffer. (I/O/Z)
(4)
SCI receive data (I)
-
Trip zone 5 (I)
General purpose input/output 29. This pin has an 8-mA (typical) output buffer. (I/O/Z)
(4)
SCI transmit data (O)
-
Trip zone 6 (I)
General purpose input/output 30. This pin has an 8-mA (typical) output buffer. (I/O/Z)
(4)
Enhanced CAN-A receive data (I)
-
-
General purpose input/output 31. This pin has an 8-mA (typical) output buffer. (I/O/Z)
(4)
Enhanced CAN-A transmit data (O)
-
-
General purpose input/output 32 (I/O/Z)
(4)
I2C data open-drain bidirectional port (I/OD)
Enhanced PWM external sync pulse input (I)
ADC start-of-conversion (O)
General-Purpose Input/Output 33 (I/O/Z)
(4)
I2C clock open-drain bidirectional port (I/OD)
Enhanced PWM external synch pulse output (O)
ADC start-of-conversion (O)
General-Purpose Input/Output 34 (I/O/Z)
(4)
-
-
-
83
C7
91
C5
99
A2
79
C8
92
D5
4
C3
6
D2
7
D1
100
A1
5
C1
43
G7
Introduction
21
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