參數(shù)資料
型號: TMS320F28069PFPQ
廠商: Texas Instruments
文件頁數(shù): 102/174頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 256KB FLASH 80HTQFP
產(chǎn)品培訓(xùn)模塊: ControlSUITE
Piccolo F2806x
TPS75005 Single IC Power for C2000 MCU
標(biāo)準(zhǔn)包裝: 1,000
系列: TMS320F2806x, Piccolo™, C2000™
核心處理器: C28x
芯體尺寸: 32-位
速度: 80MHz
連通性: CAN,I²C,McBSP,SCI,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 256KB(128K x 16)
程序存儲器類型: 閃存
RAM 容量: 50K x 16
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 80-TQFP 裸露焊盤
包裝: 托盤
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
2.5.8
M0, M1 SARAMs
All devices contain these two blocks of single-access memory, each 1K x 16 in size. The stack pointer
points to the beginning of block M1 on reset. The M0 and M1 blocks, like all other memory blocks on C28x
devices, are mapped to both program and data space. Hence, the user can use M0 and M1 to execute
code or for data variables. The partitioning is performed within the linker. The C28x device presents a
unified memory map to the programmer. This makes for easier programming in high-level languages.
2.5.9
L4 SARAM, and L0, L1, L2, L3, L5, L6, L7, and L8 DPSARAMs
The device contains up to 48K x 16 of single-access RAM. To ascertain the exact size for a given device,
see the device-specific memory map figures in Section 2.2. This block is mapped to both program and
data space. L0 is 2K in size. L1 and L2 are each 1K in size. L3 is 4K in size. L4, L5, L6, L7, and L8 are
each 8K in size. L0, L1, and L2 are shared with the CLA, which can utilize these blocks for its data space.
L3 is shared with the CLA, which can utilize this block for its program space. L5, L6, L7, and L8 are
shared with the DMA, which can utilize these blocks for its data space. DPSARAM refers to the dual-port
configuration of these blocks.
2.5.10 Boot ROM
The Boot ROM is factory-programmed with boot-loading software. Boot-mode signals are provided to tell
the bootloader software what boot mode to use on power up. The user can select to boot normally or to
download new software from an external connection or to select boot software that is programmed in the
internal Flash/ROM. The Boot ROM also contains standard tables, such as SIN/COS waveforms, for use
in math-related algorithms.
Table 2-6. Boot Mode Selection
GPIO34/COMP2OUT/
MODE
GPIO37/TDO
TRST
MODE
COMP3OUT
3
1
0
GetMode
2
1
0
Wait (see Section 2.5.11 for description)
1
0
1
0
SCI
0
Parallel IO
EMU
x
1
Emulation Boot
2.5.10.1 Emulation Boot
When the emulator is connected, the GPIO37/TDO pin cannot be used for boot mode selection. In this
case, the boot ROM detects that an emulator is connected and uses the contents of two reserved SARAM
locations in the PIE vector table to determine the boot mode. If the content of either location is invalid,
then the Wait boot option is used. All boot mode options can be accessed in emulation boot.
2.5.10.2 GetMode
The default behavior of the GetMode option is to boot to flash. This behavior can be changed to another
boot option by programming two locations in the OTP. If the content of either OTP location is invalid, then
boot to flash is used. One of the following loaders can be specified: SCI, SPI, I2C, CAN, or OTP.
Copyright 2010–2012, Texas Instruments Incorporated
Device Overview
33
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