參數(shù)資料
型號： TMS320LC2406PGE
廠商： Texas Instruments, Inc.
英文描述： 1A, 52kHz (250khz Max) Current Mode PWM Control Circuit with 16V UVLO Threshold and 96% Max Duty Cycle<sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup> ; Package: 8 LEAD PDIP; No of Pins: 8; Container: Rail; Qty per Container: 50
中文描述： DSP控制器
文件頁數(shù)： 36/123頁
文件大?。?/td> 1205K
代理商： TMS320LC2406PGE
www.ti.com
3.4
Device Emulation Registers
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 3-8. Peripheral Frame 2 Registers
(1)(2)
NAME
ADDRESS RANGE
0x7010
0x702F
0x7040
0x704F
0x7050
0x705F
0x7070
0x707F
0x7100
0x711F
0x7740
0x774F
0x7750
0x775F
0x7760
0x776F
0x7780
0x778F
0x7900
0x792F
SIZE (x16)
ACCESS TYPE
System Control Registers
32
EALLOW Protected
SPI-A Registers
16
Not EALLOW Protected
SCI-A Registers
16
Not EALLOW Protected
External Interrupt Registers
16
Not EALLOW Protected
ADC Registers
32
Not EALLOW Protected
SPI-B Registers
16
Not EALLOW Protected
SCI-B Registers
16
Not EALLOW Protected
SPI-C Registers
16
Not EALLOW Protected
SPI-D Registers
16
Not EALLOW Protected
I
2
C Registers
48
Not EALLOW Protected
(1)
(2)
Peripheral Frame 2 only allows 16-bit accesses. All 32-bit accesses are ignored (invalid data may be returned or written).
Missing segments of memory space are reserved and should not be used in applications.
These registers are used to control the protection mode of the C28x CPU and to monitor some critical
device signals. The registers are defined in
Table 3-9
.
Table 3-9. Device Emulation Registers
ADDRESS
RANGE
0x0880
0x0881
0x0882
NAME
SIZE (x16)
DESCRIPTION
DEVICECNF
2
Device Configuration Register
PARTID
1
Part ID Register
0x002C
(1)
- F2801/9501
0x0034 - F2806
0x003C - F2808
0x0000 - Silicon Rev. 0 - TMX
0x0001 - Silicon Rev. A - TMX
0x0002 - Silicon Rev. B - TMS
REVID
0x0883
1
Revision ID Register
PROTSTART
PROTRANGE
0x0884
0x0885
1
1
Block Protection Start Address Register
Block Protection Range Address Register
(1)
The first byte (00) denotes flash devices. "FF" is reserved for future ROM devices. Other values are reserved for future devices.
36
Functional Overview
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