參數(shù)資料
型號： TMS320LF2407PZ
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DSP CONTROLLERS
中文描述： DSP控制器
文件頁數(shù)： 115/123頁
文件大?。?/td> 1205K
代理商： TMS320LF2407PZ
www.ti.com
6.11
Flash Timing
Page Wait State
t
a(fp)
t
c(SCO)
1
(round up to the next highest integer) or 0, whichever is larger
Random Wait State
t
a(fr)
t
c(SCO)
1
(round up to the next highest integer) or 1, whichever is larger
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 6-41. Flash Endurance
MIN
100
TYP
1000
MAX
UNIT
cycles
write
N
f
N
OTP
Flash endurance for the array (write/erase cycles)
OTP endurance for the array (write cycles)
0
°
C to 85
°
C (ambient)
0
°
C to 85
°
C (ambient)
1
Table 6-42. Flash Parameters at 100-MHz SYSCLKOUT
PARAMETER
(1)
16-Bit Word
TEST CONDITIONS
MIN
TYP
50
MAX
UNIT
μ
s
Program
Time
16K Sector
8K Sector
4K Sector
16K Sector
8K Sector
4K Sector
V
current consumption during the
Erase/Program cycle
500
250
125
10
10
10
75
ms
ms
ms
S
S
S
mA
Erase Time
I
DD3VFLP
Erase
Program
35
mA
mA
I
DDP
V
current consumption during Erase/Program
cycle
V
current consumption during Erase/Program
cycle
140
I
DDIOP
20
mA
(1)
Typical parameters as seen at room temperature using flash API version 3.00 including function call overhead.
Table 6-43. Flash/OTP Access Timing
PARAMETER
(1)
MIN
36
36
60
TYP
MAX
UNIT
ns
ns
ns
t
a(fp)
t
a(fr)
t
a(OTP)
(1)
Paged flash access time
Random flash access time
OTP access time
For 100 MHz, PAGE WS = 3 and RANDOM WS = 3; for 75 MHz, PAGE WS = 2, and RANDOM WS = 2.
Equations to compute the page wait state and random wait state in
Table 6-44
are as follows:
Electrical Specifications
115
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