參數(shù)資料
型號： TMS320M642AGDK5
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： Video/Imaging Fixed-Point Digital Signal Processor
中文描述： 視頻/影像定點數(shù)字信號處理器
文件頁數(shù)： 67/123頁
文件大小： 1205K
代理商： TMS320M642AGDK5
www.ti.com
TX FIFO _0
-----
LSPCLK
WUT
Frame Format and Mode
Even/Odd
SCICCR.6 SCICCR.5
Enable
Parity
SCI RX Interrupt select logic
BRKDT
SCIRXST.5
RXRDY
SCIRXST.6
SCICTL1.3
1
8
SCICTL2.1
RX/BK INT ENA
SCIRXD
SCIRXST.1
TXENA
SCI TX Interrupt select logic
TX EMPTY
SCICTL2.6
TXRDY
SCICTL2.7
SCICTL2.0
TX INT ENA
SCITXD
RXENA
SCICTL1.0
SCIRXD
RXWAKE
SCICTL1.6
RX ERR INT ENA
TXWAKE
SCITXD
SCITXBUF.7-0
SCIHBAUD. 15 - 8
Baud Rate
MSbyte
Register
SCILBAUD. 7 - 0
Transmitter-Data
Buffer Register
8
Baud Rate
LSbyte
Register
RXSHF
Register
TXSHF
Register
8
TX FIFO registers
TX FIFO
TX Interrupt
Logic
TXINT
SCIFFTX.14
-----
RX FIFO _0
SCIRXBUF.7-0
Receive Data
Buffer register
SCIRXBUF.7-0
8
RX FIFO registers
RX Interrupt
Logic
RXINT
RX FIFO
SCIFFRX.15
RXFFOVF
RX Error
SCIRXST.7
RX Error
PE
FE OE
SCIRXST.4 - 2
To CPU
To CPU
AutoBaud Detect logic
SCICTL1.1
SCIFFENA
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Figure 4-13
shows the SCI module block diagram.
Figure 4-13. Serial Communications Interface (SCI) Module Block Diagram
Peripherals
67
相關PDF資料
PDF描述
TMS320M642AGDK6 1A, 52kHz (250kHz Max) Current Mode PWM Control Circuit with 8.4V UVLO Threshold and 96% Max Duty Cycle; Package: SOIC 14 LEAD; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500
TMS320M642AGDK7 Video/Imaging Fixed-Point Digital Signal Processor
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