參數(shù)資料
型號(hào)： TMS370C042ANJT
元件分類： 8位微控制器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 4/48頁(yè)
文件大?。?/td> 711K
代理商： TMS370C042ANJT
TMS370Cx36
8-BIT MICROCONTROLLER
SPNS039B – JANUARY 1996 – REVISED FEBRUARY 1997
4
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
description (continued)
Table 1 provides a memory configuration overview of the TMS370Cx36 devices.
Table 1. Memory Configurations
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The suffix letter A appended to the device names in Table 1 indicates the configuration of the devices. ROM
or EPROM devices have different configurations as indicated in Table 2. ROM devices with the suffix letter A
are configured through a programmable contact during manufacture.
DEVICE
PROGRAM MEMORY
DATA MEMORY
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44 PIN PACKAGES
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TMS370C736A
SE370C736A
System evaluators and development are for use only in prototype environment, and their reliability has not been characterized.
—
16K
256
FN – PLCC
—
16K
512
256
FZ – CLCC
Table 2. Suffix Letter Configuration
DEVICE
CLOCK
LOW-POWER MODE
EPROM A
Divide-by-4 (Standard oscillator)
Enabled
ROM A
Divide by 4 or Divide by 1 (PLL)
Divide-by-4 or Divide-by-1 (PLL)
Enabled or disabled
Refer to the “device numbering conventions” section for device nomenclature and to the “device part numbers” section for ordering.
The 16K bytes of mask-programmable ROM in the associated TMS370Cx36 devices are replaced in the
TMS370C736 with 16K bytes of EPROM. All other available memory and on-chip peripherals are identical. The
OTP (TMS370C736) and reprogrammable (SE370C736) devices are available.
The TMS370C736 OTP device is available in a plastic package. This microcontroller is effective to use for
immediate production updates for other members of the TMS370Cx36 family or for low-volume production runs
when the mask charge or cycle time for the low-cost mask ROM devices is not practical.
The SE370C736 has a windowed ceramic package to allow reprogramming of the program EPROM memory
during the development/prototyping phase of design. The SE370C736 device allows quick updates to
breadboards and prototype systems while iterating initial designs.
The TMS370Cx36 family provides two low-power modes (STANDBY and HALT) for applications where
low-power consumption is critical. Both modes stop all CPU activity (that is, no instructions are executed). In
the STANDBY mode, the internal oscillator, the PACT counter, and PACT’s first command/definition entry
remain active. This allows the PACT module to bring the device out of STANDBY mode. In the HALT mode, all
device activity is stopped. The device retains all RAM data and peripheral configuration bits throughout both
low-power modes.
The TMS370Cx36 features advanced register-to-register architecture that allows direct arithmetic and logical
operations without requiring an accumulator (for example, ADD R24, R47; add the contents of register 24 to
the contents of register 47 and store the result in register 47). The TMS370Cx36 family is fully
instruction-set-compatible, providing easy transition between members of the family.
The TMS370Cx36 has a PACT module that acts as a timer coprocessor by gathering timing information on input
signals and controlling output signals with little or no intervention by the CPU. The coprocessor nature of this
module allows for levels of flexibility and power not found in traditional microcontroller timers.
相關(guān)PDF資料
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