參數(shù)資料
型號(hào)： TMX320DM6437AZDUA
廠商： Texas Instruments, Inc.
英文描述： Digital Media Processor
中文描述： 數(shù)字媒體處理器
文件頁(yè)數(shù)： 167/309頁(yè)
文件大?。?/td> 2216K
代理商： TMX320DM6437AZDUA
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P
6.1.3
Timing Parameters and Board Routing Analysis
6.2 Recommended Clock and Control Signal Transition Behavior
6.3 Power Supplies
6.3.1
Power-Supply Sequencing
6.3.2
Power-Supply Design Considerations
6.3.3
Power-Supply Decoupling
TMS320DM6437
Digital Media Processor
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
The timing parameter values specified in this data sheet do
not
include delays by board routings. As a
good board design practice, such delays must
always
be taken into account. Timing values may be
adjusted by increasing/decreasing such delays. TI recommends utilizing the available I/O buffer
information specification (IBIS) models to analyze the timing characteristics correctly. To properly use IBIS
models to attain accurate timing analysis for a given system, see the
Using IBIS Models for Timing
Analysis
application report (literature number SPRA839). If needed, external logic hardware such as
buffers may be used to compensate any timing differences.
For the DDR2 memory controller interface, it is
not
necessary to use the IBIS models to analyze timing
characteristics. TI provides a PCB routing rules solution that describes the routing rules to ensure the
DDR2 memory controller interface timings are met. See the
Implementing DDR2 PCB Layout on the
TMS320DM643x DMP
Application Report (literature number TBD).
All clocks and control signals
must
transition between V
IH
and V
IL
(or between V
IL
and V
IH
) in a monotonic
manner.
For more information regarding TI's power management products and suggested devices to power TI
DSPs, visit
www.ti.com/dsppower
.
The DM6437 includes one core supply (CV
DD
), and two I/O supplies—DV
DD33
and DV
DDR2
. To ensure
proper device operation, a specific power-up sequence
must
be followed. Some TI power-supply devices
include features that facilitate power sequencing—for example, Auto-Track and Slow-Start/Enable
features. For more information on TI power supplies and their features, visit
www.ti.com/dsppower
.
Here is a summary of the power sequencing requirements:
The power ramp order
must
be DV
DD33
before DV
DDR2
, and DV
DDR2
before CV
DD
—meaning during
power up, the voltage at the DV
DDR2
rail should never exceed the voltage at the DV
DD33
rail. Similarly,
the voltage at the CV
DD
rail should never exceed the voltage at the DV
DDR2
rail.
From the time that power ramp begins, all power supplies (DV
DD33
, DV
DDR2
, CV
DD
)
must
be stable
within 200 ms. The term "stable" means reaching the recommended operating condition (see
Section 5.2
,
Recommended Operating Conditions
table).
Core and I/O supply voltage regulators should be located close to the DSP to minimize inductance and
resistance in the power delivery path. Additionally, when designing for high-performance applications
utilizing the DM6437 device, the PC board should include separate power planes for core, I/O, and
ground; all bypassed with high-quality low-ESL/ESR capacitors.
In order to properly decouple the supply planes from system noise, place as many capacitors (caps) as
possible close to the DSP. These caps need to be close to the DSP, no more than 1.25 cm maximum
distance to be effective. Physically smaller caps are better, such as 0402, but need to be evaluated from a
yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling
capacitors, therefore physically smaller capacitors should be used while maintaining the largest available
capacitance value.
Larger caps for each supply can be placed further away for bulk decoupling. Large bulk caps (on the order
of 100
μ
F) should be furthest away, but still as close as possible. Large caps for each supply should be
placed outside of the BGA footprint.
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Peripheral Information and Electrical Specifications
167
相關(guān)PDF資料
PDF描述
TMX320DM6437BZDUA Digital Media Processor
TMX320DM6437BZWTA Digital Media Processor
TMS320DM6443_07 Digital Media System-on-Chip
TMX320DM6443AZWT Digital Media System-on-Chip
TMX320DM6443ZWT Digital Media System-on-Chip
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMX320DM6437AZWTA 制造商:Texas Instruments 功能描述:TMX320DM6437 PG1.1 361PIN PB-FREE NFBGA - Trays
TMX320DM6437BZDUA 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Dig Media Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMX320DM6437BZWTA 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Dig Media Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMX320DM6441CZWT 制造商:Texas Instruments 功能描述:
TMX320DM6441DZWT 制造商:Texas Instruments 功能描述:DAVINCI DIGITAL MEDIA SYSTEM-ON-CHIP - Tape and Reel
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