參數(shù)資料
型號: TN2435
廠商: Supertex, Inc.
英文描述: N-Channel Enhancement-Mode Vertical DMOS FETs
中文描述: N溝道增強型場效應管垂直的DMOS
文件頁數(shù): 2/4頁
文件大?。?/td> 448K
代理商: TN2435
2
TN2435
Thermal Characteristics
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Switching Waveforms and Test Circuit
Symbol
BV
DSS
V
GS(th)
V
GS(th)
I
GSS
I
DSS
Parameter
Min
350
0.8
Typ
Max
Unit
V
V
mV/
°
C
nA
μ
A
mA
Conditions
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Change in V
GS(th)
with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
V
GS
= 0V, I
D
= 250
μ
A
V
GS
= V
DS
, I
D
= 1.0mA
V
GS
= V
DS
, I
D
= 1.0mA
V
GS
=
±
20V, V
DS
= 0V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
°
C
V
GS
= 4.5V, V
DS
= 25V
V
GS
= 10V, V
DS
= 25V
V
GS
= 3.0V, I
D
= 150mA
V
GS
= 4.5V, I
D
= 250mA
V
GS
= 10V, I
D
= 750mA
V
GS
= 10V, I
D
= 750mA
V
DS
= 25V, I
D
= 350mA
-5.5
100
10
1.0
I
D(ON)
ON-State Drain Current
0.5
1.0
A
R
DS(ON)
Static Drain-to Source ON-State
Resistance
15.0
10.0
6.0
1.7
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward Voltage Drop
Reverse Recovery Time
%/
°
C
m
125
125
25
8
5
10
28
10
200
70
25
20
20
40
30
1.5
V
GS
= 0V, V
DS
= 25V
f = 1.0MHz
pF
ns
V
ns
V
GS
= 0V, I
SD
= 750mA
V
GS
= 0V, I
SD
= 750mA
300
Notes:
1.All D.C. parameters 100% tested at 25
°
C unless otherwise stated. (Pulse test: 300
μ
s pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
Electrical Characteristics
(@ 25
°
C unless otherwise specified)
V
DD
= 25V,
I
D
= 750mA
R
GEN
= 25
Package
I
D
(continuous)*
I
D
(pulsed)
Power Dissipation
@ T
A
= 25
°
C
1.6W
θ
jc
°
C/W
θ
ja
°
C/W
78
I
DR
*
I
DRM
TO-243AA
365mA
1.8A
15
365mA
1.8A
*
I
D
(continuous) is limited by max rated T
j
.
Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant P
D
increase possible on ceramic substrate.
相關PDF資料
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TN2435N8 N-Channel Enhancement-Mode Vertical DMOS FETs
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