參數(shù)資料
型號: TN28F001BX-B90
廠商: INTEL CORP
元件分類: DRAM
英文描述: 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
中文描述: 128K X 8 FLASH 12V PROM, 90 ns, PQCC32
封裝: 0.450 X 0.550 INCH, PLASTIC, LCC-32
文件頁數(shù): 13/33頁
文件大?。?/td> 436K
代理商: TN28F001BX-B90
28F001BX-T/28F001BX-B
290406–8
Bus
Command
Comments
Operation
Write
Erase
Setup
Data
e
20H
Address
e
Within Block to be erased
Write
Erase
Data
e
D0H
Address
e
Within Block to be erased
Read
Status Register Data.
Toggle OE
Y
or CE
Y
to update Status
Register
Standby
Check SR.7
1
e
Ready, 0
e
Busy
Repeat for subsequent blocks.
Full status check can be done after each block or after a sequence of
blocks.
Write FFH after the last block erase operation to reset the device to
Read Array Mode.
Bus
Command
Comments
Operation
Standby
Check SR.3
1
e
V
PP
Low Detect
Standby
Check SR.4, 5
Both 1
e
Command Sequence Error
Standby
Check SR.5
1
e
Block Erase Error
SR.3 MUST be cleared, if set during an erase attempt, before further
attempts are allowed by the Write State Machine.
SR.5 is only cleared by the Clear Status Register Command, in cases
where multiple blocks are erased before full status is checked.
If error is detected, clear the Status Register before attempting retry or
other error recovery.
Figure 10. 28F001BX Block Erase Flowchart
13
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