TOIM5232
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Vishay Semiconductors
Rev. 1.3, 04-Jul-12
8
Document Number: 81749
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TOIM4232 (TOIM5232) ENCODER - DECODER INTERFACE
PROGRAMMING AND DATA TRANSMISSION
Operation
and
programming
of
the
TOIM4232
and
TOIM5232 interface devices are described below. Figure 1
shows the basic circuit design with 3 blocks: the RS232 to
3 V logic level shifter, the encoder/decoder (endec) circuit
and the transceiver to build a dongle for RS232 IrDA
extension. U1 is the level shifter to convert the RS232 logic
levels to unipolar 3 V logic; U2 is the encoder/decoder
Interface (endec) converting the NRZ - RS232 logic to IrDA
RZI - logic. The transceiver U3 transmits and receives
IrDA-compliant optical signals.
Fig. 1 - Circuit Diagram of the Demo Board
CIRCUIT DESCRIPTION
This circuit demonstrates the operation of an SIR IrDA
transceiver module. The transceiver U3 (e.g., as shown the
TFDU4101 or TFDU4301 or any other) converts the digital
electrical input signal to an optical output signal to be
transmitted, receives the optical signal, and converts these
to electrical digital signals. While the IrDA physical layer
protocol transmits only the “0” represented by a pulse with
a “Return to Zero Inverted (RZI)” logic, the RS232 protocol
needs a “No Return to Zero (NRZ)” representation. This
decoding/encoding process is done by U2, an interface
circuit stretching the received pulses and shortening the
pulses to be transmitted according to the IrDA physical layer
conditions. U1 interfaces the RS232 logic bipolar levels to
the 3 V logic of the Endec U2. The board is connected by
CON9 to the RS232 port (of a computer or other equipment.
The basic IrDA transmission speed is 9600 bit/s. This is the
default state of the Endec in power-on condition. Also,
activating the reset line at pin 1 (18) will set the device to this
basic state.
Note: The first pin number refers to TOIM4232; the second
number in brackets refers to TOIM5232. The crystal Y1
controls the timing of the Endec as a clock reference. The
outputs S1 and S2 are programmable outputs for control
operations and the outputs RD_LED and TD_LED can drive
LEDs for indicating data flow.
PROGRAMMING THE ENDEC
For decoding data rates other than the default, the endec is
to be programmed to set the internal counters and timers.
To switch the endec from the data transfer mode to the bit
rate programming mode, the input BR/D, pin 2 (19) is set
active high (BR/D = “1”). In this case the TOIM5232
interprets the 7 LSBs at the TD_232 input as a control word.
The operating bit rate will change to its supposedly new rate
when the BR/D returns back to low (“0”). Set the UART to 8
bit, no parity,
1 stop bit.
The control byte consists of 8 bit after the start bit (STA,
which is “0”). Keep in mind that the order is LSB first, MSB
last.
The diagram in figure 2 shows the programming byte
“0-1010-1100” in the order STA, B0, B1, B2, B3, S0, S1, S2,
X. This order is from right to left in table 1. B0 is sent first
as LSB (see figure 2).
The four least significant bits are responsible for the data
rate according to table 2 while the four higher bits are for
setting the IrDA pulse duration (S0), and the two outputs of
the endec S1 and S2. Bit 8 is not used.
RXD
TXD
RTS (BR/D)
U3
TFDU4101
2
4
6
8
5
3
1
7
Cathode
RXD
Vcc1
GND
SD
TXD
Anode
.
C3
J1
CON9
1
2
3
4
5
6
7
8
9
C6
C5
U2
TOIM4232
1(18)
2(19)
3(1)
4(2)
5(3)
6(4)
7(5)
8(7)
9(9)
15(16)
14(14)
13(13)
12(12)
11 *)
10(10)
16(17)
RESET
BR/D
RD_232
TD_232
Vcc_SD
X1
X2
GND
TD_LED
RD_IR
TD_IR
S2
S1
NC
RD_LED
Vcc
C7
U1
MAX3232
13
8
11
10
1
3
4
5
2
6
12
9
14
7
16
15
R1IN
R2IN
T1IN
T2IN
C+
C1-
C2+
C2-
V+
V-
R1OUT
R2OUT
T1OUT
T2OUT
VCC
GND
C8
C9
R2
Z2
R1
+
C2
C1
Y1
J2
CON2
1
2
R4
C4
R3
C11
+
C10
External input
3.6V max.
DTR (RESET)
+
(TOIM5232)
TFDU4301
optional
TFDU4300:Vlog
TFDU4101:NC
This line not used fot TFDU4101
IRED
+
Vcc
*) (6), (8), (11), (15), (20)
21046