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SLOS398E – DECEMBER 2002 – REVISED AUGUST 2010
In this example, CI is 33 nF, so one would likely choose a value of 0.1 mF, as this value is commonly used. If the
gain is known and will be constant, use ZI from Table 1 to calculate CI. A further consideration for this capacitor is the leakage path from the input source through the input network (CI) and the feedback network to the load.
This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom,
especially in high-gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best
choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in
most applications as the dc level there is held at 2.5 V, which is likely higher than the source dc level. Note that it
is important to confirm the capacitor polarity in the application.
POWER SUPPLY DECOUPLING
The TPA3001D1 is a high-performance CMOS audio amplifier that requires adequate power-supply decoupling
to ensure the output total harmonic distortion (THD) is as low as possible. Power-supply decoupling also
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is
achieved by using two capacitors of different types that target different types of noise on the power supply leads.
For higher-frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR)
ceramic capacitor, typically 1 mF, placed as close as possible to the device VCC lead works best. For filtering
lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 mF or greater placed near the audio
power amplifier is recommended.
BSN AND BSP CAPACITORS
The full H-bridge output stage uses only NMOS transistors. It therefore requires bootstrap capacitors for the high
side of each output to turn on correctly. A 0.22-mF ceramic capacitor, rated for at least 25 V, must be connected
from each output to its corresponding bootstrap input. Specifically, one 0.22-mF capacitor must be connected
from OUTP to BSP, and one 0.22-mF capacitor must be connected from OUTN to BSN. (See
Figure 30.)BSN AND BSP RESISTORS
To limit the current when charging the bootstrap capacitors, a resistor with a value of approximately 50
(±10%
maximum) must be placed in series with each bootstrap capacitor. The current is limited to less than 500 mA.
VCLAMP CAPACITOR
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, an internal
regulator clamps the gate voltage. A 1-mF capacitor must be connected from VCLAMP (pin 7) to ground and
must be rated for at least 25 V. The voltage at VCLAMP (pin 7) varies with VCC and may not be used for
powering any other circuitry.
MIDRAIL BYPASS CAPACITOR
The midrail bypass capacitor (C11 of
Figure 30) is the most critical capacitor and serves several important
functions. During start-up or recovery from shutdown mode, CBYPASS determines the rate at which the amplifier
starts up. The second function is to reduce noise produced by the power supply caused by coupling into the
output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as
degraded PSRR and THD+N.
For the bypass capacitor (C11), a ceramic or tantalum low-ESR capacitor of 0.47 mF to 1 mF is recommended for
the best THD noise, and depop performance. The bypass capacitor must have a value greater than the input
capacitors for optimum depop performance.
VREF DECOUPLING CAPACITOR
The VREF terminal (pin 23) is the output of an internally-generated 5-V supply, used for the oscillator and
gain-setting logic. It requires a 0.1-mF to 1-mF capacitor to ground to keep the regulator stable. The regulator may
not be used to power any additional circuitry.
Copyright 2002–2010, Texas Instruments Incorporated
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