TPA3002D2
SLOS402C DECEMBER 2002 REVISED JANUARY 2004
www.ti.com
4
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NO.
NAME
I/O
DESCRIPTION
AGND
26, 30
Analog ground for digital/analog cells in core
AVCC
33
High-voltage analog power supply (8.5 V to 14 V)
AVDD
29
O
5-V Regulated output capable of 100-mA output
AVDDREF
7
O
5-V Reference output—provided for connection to adjacent VREF terminal.
BSLN
13
I/O
Bootstrap I/O for left channel, negative high-side FET
BSLP
24
I/O
Bootstrap I/O for left channel, positive high-side FET
BSRN
48
I/O
Bootstrap I/O for right channel, negative high-side FET
BSRP
37
I/O
Bootstrap I/O for right channel, positive high-side FET
COSC
28
I/O
I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5
LINN
6
I
Negative differential audio input for left channel
LINP
5
I
Positive differential audio input for left channel
LOUTN
16, 17
O
Class-D 1/2-H-bridge negative output for left channel
LOUTP
20, 21
O
Class-D 1/2-H-bridge positive output for left channel
MODE
34
I
Input for MODE control. A logic high on this pin places the amplifier in the variable output mode and the Class-D
outputs are disabled. A logic low on this pin places the amplifier in the Class-D mode and Class-D stereo outputs
are enabled. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode to be used as
line-level outputs for external amplifiers.
MODE_OUT
35
O
Output for control of the variable output amplifiers. When the MODE pin (34) is a logic high, the MODE_OUT
pin is driven low. When the MODE pin (34) is a logic low, the MODE_OUT pin is driven high. This pin is intended
for MUTE control of an external headphone amplifier. Leave unconnected when not used for headphone
amplifier control.
PGNDL
18, 19
Power ground for left channel H-bridge
PGNDR
42, 43
Power ground for right channel H-bridge
PVCCL
14, 15
Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to PVCCR or AVCC.
PVCCL
22, 23
Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to PVCCR or AVCC.
PVCCR
38,39
Power supply for right channel H-bridge (tied to pins 46 and 47 internally), not connected to PVCCL or AVCC.
PVCCR
46, 47
Power supply for right channel H-bridge (tied to pins 38 and 39 internally), not connected to PVCCL or AVCC.
REFGND
12
Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume, connect the DAC
ground to this terminal.
RINP
3
I
Positive differential audio input for right channel
RINN
2
I
Negative differential audio input for right channel
ROSC
27
I/O
Current setting resistor for ramp generator. Nominally equal to 1/8*VCC
ROUTN
44, 45
O
Class-D 1/2-H-bridge negative output for right channel
ROUTP
40, 41
O
Class-D 1/2-H-bridge positive output for right channel
SD
1
I
Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to VCC.
VARDIFF
9
I
DC voltage to set the difference in gain between the Class-D and VAROUT outputs. Connect to GND or
AVDDREF if VAROUT outputs are unconnected.
VARMAX
10
I
DC voltage that sets the maximum gain for the VAROUT outputs. Connect to GND or AVDDREF if VAROUT
outputs are unconnected.
VAROUTL
31
O
Variable output for left channel audio. Line level output for driving external HP amplifier.
VAROUTR
32
O
Variable output for right channel audio. Line level output for driving external HP amplifier.
VCLAMPL
25
Internally generated voltage supply for left channel bootstrap capacitors.
VCLAMPR
36
Internally generated voltage supply for right channel bootstrap capacitors.
VOLUME
11
I
DC voltage that sets the gain of the Class-D and VAROUT outputs.
VREF
8
I
Analog reference for gain control section.
V2P5
4
O
2.5-V Reference for analog cells, as well as reference for unused audio input when using single-ended inputs.
—
Thermal
Pad
Connect to AGND and PGND—should be center point for both grounds.