參數資料
型號: TPA3107D2_07
廠商: Texas Instruments, Inc.
英文描述: 15-W STEREO CLASS-D AUDIO POWER AMPLIFIER
中文描述: 15 W立體聲D類音頻功率放大器
文件頁數: 2/36頁
文件大?。?/td> 510K
代理商: TPA3107D2_07
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
TYPICAL DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
TPA3107D2
SLOS509A–OCTOBER 2006–REVISED NOVEMBER 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
UNIT
V
CC
Supply voltage
AVCC, PVCC
SHUTDOWN, MUTE
GAIN0, GAIN1, RINN, RINP, LINN, LINP, MSTR/SLV, SYNC
Continuous total power dissipation
Operating free-air temperature range
Operating junction temperature range
(2)
Storage temperature range
Human body model
(3)
(all pins)
Electrostatic discharge
Charged-device model
(4)
(all pins)
–0.3 V to 30 V
–0.3 V to V
CC
+ 0.3 V
–0.3 V to VREG + 0.5 V
See Dissipation Rating Table
–40
°
C to 85
°
C
–40
°
C to 150
°
C
–65
°
C to 150
°
C
±
2 kV
±
500 V
V
I
Input voltage
T
A
T
J
T
stg
(1)
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operations of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The TPA3107D2 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected
to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection
shutdown. See TI Technical Briefs
SCBA017D
and
SLUA271
for more information about using the QFN thermal pad. See TI Technical
Briefs
SLMA002
for more information about using the HTQFP thermal pad.
In accordance with JEDEC Standard 22, Test Method A114-B.
In accordance with JEDEC Standard 22, Test Method C101-A
(2)
(3)
(4)
PACKAGE
(1)
64-pin PAP (HTQFP)
T
A
25
°
C
5.43 W
DERATING FACTOR
43.5 mW/
°
C
(2)
T
A
= 70
°
C
3.47 W
T
A
= 85
°
C
2.82 W
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at
www.ti.com
.
This data was taken using a 2 oz trace and copper pad that is soldered directly to a 2-layer high-k PCB (EVM). These are typical values.
See TI Technical Briefs
SLMA002
for more information about using the HTQFP thermal pad.
(2)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
CC
V
IH
V
IL
Supply voltage
PVCC, AVCC
10
26
V
High-level input voltage
SHUTDOWN, MUTE, GAIN0, GAIN1, MSTR/SLV, SYNC
2
V
Low-level input voltage
SHUTDOWN, MUTE, GAIN0, GAIN1, MSTR/SLV, SYNC
0.8
V
SHUTDOWN, V
I
= V
CC
, V
CC
= 24 V
MUTE, V
I
= V
CC
, V
CC
= 24 V
GAIN0, GAIN1, MSTR/SLV, SYNC, V
I
= VREG,
V
CC
= 24 V
SHUTDOWN, V
I
= 0, V
CC
= 24 V
SYNC, MUTE, GAIN0, GAIN1, MSTR/SLV, V
I
= 0 V,
V
CC
= 24 V
FAULT, I
OH
= 1 mA
FAULT, I
OL
= -1 mA
R
OSC
Resistor = 100 k
125
75
I
IH
High-level input current
μA
2
2
I
IL
Low-level input current
μA
1
V
OH
V
OL
f
OSC
R
L
T
A
High-level output voltage
VREG - 0.6
V
Low-level output voltage
AGND + 0.4
V
Oscillator frequency
200
300
kHz
Load Resistance
6
°
C
Operating free-air temperature
–40
85
2
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