參數(shù)資料
型號: TPA6011A4PWPG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻控制
英文描述: 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PDSO24
封裝: GREEN, PLASTIC, HTSSOP-24
文件頁數(shù): 15/35頁
文件大小: 744K
代理商: TPA6011A4PWPG4
www.ti.com
INPUT RESISTANCE
C
IN
Ri
Rf
Input Signal
*3 dB
+
1
2p CR
i
(1)
INPUT CAPACITOR, C
i
f
c(highpass) +
1
2 p R
i
C
i
3 dB
fc
(2)
C
i +
1
2 p R
i
fc
(3)
TPA6011A4
SLOS392A – FEBRUARY 2002 – REVISED JULY 2004
Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest
value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB
or cutoff frequency also changes by over six times.
Figure 35. Resistor on Input for Cut-Off Frequency
The input resistance at each gain setting is given in Figure 26.
The -3-dB frequency can be calculated using Equation 1.
In the typical application an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Ri) form a
high-pass filter with the corner frequency determined in Equation 2.
The value of Ci is important to consider as it directly affects the bass (low frequency) performance of the circuit.
Consider the example where Ri is 70 k and the specification calls for a flat-bass response down to 40 Hz.
Equation 2 is reconfigured as Equation 3.
In this example, Ci is 56.8 nF, so one would likely choose a value in the range of 56 nF to 1 F. A further
consideration for this capacitor is the leakage path from the input source through the input network (Ci) and the
feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that
reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
22
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