參數(shù)資料
型號(hào): TPA6140A2YFFT
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻控制
英文描述: 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PBGA16
封裝: 1.6 X 1.6 MM, 0.4 MM PITCH, GREEN, DSBGA-16
文件頁(yè)數(shù): 17/30頁(yè)
文件大?。?/td> 705K
代理商: TPA6140A2YFFT
SLOS598A – MARCH 2009 – REVISED OCTOBER 2009................................................................................................................................................. www.ti.com
OPERATING MODES
HARDWARE SHUTDOWN
Hardware shutdown is not available in the TPA6140A2. The SWS register (Software Shutdown) must be used to
shutdown the amplifier.
SOFTWARE SHUTDOWN
Set software shutdown by writing a logic 1 in register 1, bit 0 (SWS bit). Software shutdown places the device in
the lowest power state (see the Electrical Characteristics Table for values). Engaging software shutdown turns
off the buck regulator and charge pump and disables the amplifier outputs. Write a logic 0 to the SWS bit to
reactivate the device.
Note that when the device is in SWS mode all registers will maintain their values. The HP_EN_L and HP_EN_R
bits can be reset because a full word must be used when writing just one bit to the register.
To ensure lowest current consumption and highest input to output signal attenuation, SWS must be used instead
of HP_EN_L and HP_EN_R (set HP_EN_L and HP_EN_R to logic 1) when disabling both channels of the
amplifier simultaneously. Set HP_EN_L and HP_EN_R to logic 1 before changing SWS from logic 0 to logic 1.
MUTE MODE
Set the Mute_L bit to 1 to mute the left channel output. Set the Mute_R bit to 1 to mute the right channel output.
They are respectively located at Register 2, Bits 7 and 6. Mute attenuation is -80 dB, typical. Mute attenuation
can only be guaranteed when the amplifier is operational (SWS = 0) and enabled (HP_EN_L or HP_EN_R = 1)
HI-Z MODE
HI-Z mode mutes the device and puts the amplifier outputs into a high impedance state. Use this configuration
when the outputs of the TPA6140A2 share traces with other devices whose outputs may be active. Write a logic
1 in register 3, bits 0 and 1 to enable Hi-Z mode for the left and right outputs. Place a logic 0 in register 3, bits 0
and 1 to disable the Hi-Z state. The left and right outputs can be placed into a Hi-Z state individually.
Note that to use the Hi-Z mode, the SWS bit must be equal to logic 0 (amplifier operational) and the output
headphone amplifiers must NOT be enabled (HP_EN_L and HP_EN_R = 0).
DEFAULT MODE AT START-UP
On power-up, the TPA6140A2 initializes in the following conditions:
SWS = 1 (Shutdown mode)
HP_EN_L = HP_EN_R = 0 (Outputs disabled)
Hi-Z_L = Hi-Z_R = 0 (Hi-Z off)
Mute_L = Mute_R = 1 (Amplifiers muted)
VOLUME = –59 dB
PACKAGE INFORMATION
Package Dimensions
The package dimensions for this YFF package are shown in the table below. See the package drawing at the
end of this data sheet for more details.
Table 2. YFF Package Dimensions
Packaged Devices
D
E
Min = 1530
μm
Min = 1530
μm
TPA6140A2YFF
Max = 1590
μm
Max = 1590
μm
24
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TPA6140A2
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