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參數(shù)資料
| 型號： | TPS2114PW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | GREEN, PLASTIC, TSSOP-8 |
| 文件頁數(shù)： | 19/22頁 |
| 文件大?。?/td> | 503K |
| 代理商： | TPS2114PW |
www.ti.com
SWITCHING CHARACTERISTICS
TRUTH TABLE
TPS2114
TPS2115
SLVS447A – DECEMBER 2002 – REVISED MARCH 2004
over recommended operating junction temperature range, V
I(IN1) = VI(IN2) = 5.5 V, R(ILIM) = 400 (unless otherwise noted)
TPS2114
TPS2115
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP MAX
POWER SWITCH
TJ = 25°C, CL = 1 F,
Output rise time from an
tr
VI(IN1) = VI(IN2) = 5 V
IL = 500 mA,
0.5
1.0
1.5
1
1.8
3
ms
enable(1)
See Figure 1(a)
TJ = 25°C, CL = 1 F,
Output fall time from a
tf
VI(IN1) = VI(IN2) = 5 V
IL = 500 mA,
0.35
0.5
0.7
0.5
1
2
ms
disable(1)
See Figure 1(a)
IN1 to IN2 transition,
TJ = 125°C,
VI(IN1) = 3.3 V,
CL = 10 F,
40
60
40
60
VI(IN2) = 5 V
IL= 500 mA [Measure
transition time as
tt
Transition time(1)
s
10-90% rise time or
IN2 to IN1 transition,
from 3.4 V to 4.8 V
VI(IN1) = 5 V,
40
60
40
60
on VO(OUT)],
VI(IN2) = 3.3 V
See Figure 1(b)
TJ = 25°C,
VI(IN1)= VI(IN2) = 5 V,
Turnon propagation delay
CL = 10 F,
tPLH1
Measured from enable
0.5
1
ms
from enable(1)
IL= 500 mA,
to 10% of VO(OUT)
SeeFigure 1(a)
TJ = 25°C,
VI(IN1) = VI(IN2) = 5 V,
Turnoff propagation delay
CL = 10 F,
tPHL1
Measured from disable
3
5
ms
from a disable(1)
IL= 500 mA,
to 90% of VO(OUT)
See Figure 1(a)
Logic 1 to Logic 0 tran-
sition on D1,
TJ = 25°C,
VI(IN1) = 1.5 V,
Switch-over rising
CL = 10 F,
tPLH2
VI(IN2) = 5 V,
0.17
1
0.17
1
ms
propagation delay(1)
IL= 500 mA,
VI(D0)= 0 V,
See Figure 1(c)
Measured from D1 to
10% of VO(OUT)
Logic 0 to Logic 1 tran-
sition on D1,
TJ = 25°C,
VI(IN1) = 1.5 V,
Switch-over falling
CL = 10 F,
tPHL2
VI(IN2) = 5V,
2
3
10
2
5
10
ms
propagation delay(1)
IL= 500 mA,
VI(D0)= 0 V, Measured
See Figure 1(c)
from D1 to 90% of
VO(OUT)
(1)
Not tested in production.
D1
D0
VI(IN2) > VI(IN1)
STAT
OUT(1)
0
X
Hi-Z
IN2
0
1
No
0
IN1
0
1
Yes
Hi-Z
IN2
1
0
X
0
IN1
1
X
0
Hi-Z
(1)
The under-voltage lockout circuit causes the output OUT to go Hi-Z
if the selected power supply does not exceed the IN1/IN2 UVLO, or
if neither of the supplies exceeds the internal VDD UVLO.
6
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