參數資料
型號: TPS2321IDG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16
封裝: GREEN, PLASTIC, MS-012AC, SOIC-16
文件頁數: 26/28頁
文件大?。?/td> 747K
代理商: TPS2321IDG4
www.ti.com
(1)
Test IO of ENABLE at VI(ENABLE) = 1 V and 0 V, then RI(ENABLE) =
1 V
I
O_0V * IO_1V
ELECTRICAL CHARACTERISTICS (Continued)
SLVS276E – MARCH 2000 – REVISED NOVEMBER 2006
over recommended operating temperature range (–40
°C < T
A < 85°C), 3V ≤ VI(IN1) ≤ 13V, 3V ≤ VI(IN2) ≤ 5.5V (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TIMER
V(TO_TIMER)
Threshold voltage, TIMER
0.4
0.5
0.6
V
Charge current, TIMER
VI(TIMER) = 0 V
35
50
65
A
Discharge current, TIMER
VI(TIMER) = 1 V
1
2.5
mA
CIRCUIT BREAKER
RISETx = 1 k
40
50
60
RISETx = 400 , TA = 25°C
14
19
24
VIT(CB)
Threshold voltage, circuit breaker
mV
RISETx = 1 k, TA = 25°C
44
50
53
RISETx = 1.5 k, TA = 25°C
68
73
78
I(IB_ISENSEx)
Input bias current, ISENSEx
0.1
5
A
VO(GATEx) = 4 V
400
800
Discharge current, GATEx
mA
VO(GATEx) = 1 V
25
150
Propagation (delay) time,
Cg = 50 pF,
10 mV overdrive,
tpd(CB)
1.3
s
comparator inputs to gate output
(50% to 10%),
CTIMER = 50 pF
ENABLE, ACTIVE LOW (TPS2320)
VIH(ENABLE)
High-level input voltage, ENABLE
2
V
VIL(ENABLE)
Low-level input voltage, ENABLE
0.8
V
RI(ENABLE)
Input pullup resistance, ENABLE
See (1)
100
200
300
k
VI(ENABLE) increasing above stop threshold;
td(off_ENABLE)
Turnoff delay time, ENABLE
60
s
100 ns rise time, 20 mV overdrive(2)
VI(ENABLE) decreasing below start threshold;
td(on_ENABLE)
Turnon delay time, ENABLE
125
s
100 ns fall time, 20 mV overdrive(2)
ENABLE, ACTIVE HIGH (TPS2321)
VIH(ENABLE)
High-level input voltage, ENABLE
2
V
VIL(ENABLE)
Low-level input voltage, ENABLE
0.7
V
RI(ENABLE)
Input pulldown resistance, ENABLE
100
150
300
k
VI(ENABLE) increasing above start threshold;
td(on_ENABLE)
Turnon delay time, ENABLE
85
s
100 ns rise time, 20 mV overdrive(2)
VI(ENABLE) decreasing below stop threshold;
td(off_ENABLE)
Turnoff delay time, ENABLE
100
s
100 ns fall time, 20 mV overdrive (2)
PREREG
V(VREG)
PREREG output voltage
4.5
≤ V
I(IN1)≤ 13 V
3.5
4.1
5.5
V
V(drop_PREREG)
PREREG dropout voltage
VI(IN1) = 3 V
0.1
V
(2)
Specified, but not production tested.
7
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