參數(shù)資料
型號(hào)： TPS2350PWG4
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14
封裝： GREEN, PLASTIC, TSSOP-14
文件頁(yè)數(shù)： 6/26頁(yè)
文件大?。?/td> 596K
代理商： TPS2350PWG4
= 1260 C
RAMP
t
SS
( )
AVG
SS
LSS
LOAD
RAMP
SENSE
2
i
V
=
t
2
C
100
R
SLUS574C
– JULY 2003 – REVISED MARCH 2011
APPLICATION INFORMATION
Setting the Fault Timing Capacitor
The fault timeout period is established by the value of the capacitor connected to the FLTTIM pin, CFLT. The
timeout period permits riding out spurious current glitches and surges that may occur during operation of the
system, and prevents indefinite sourcing into faulted loads. However, to ensure smooth voltage ramping under all
conditions of load capacitance and input supply potential, the minimum timeout should be set to accommodate
these system variables. To do this, a rough estimate of the maximum voltage ramp time for a completely
discharged plug-in card provides a good basis for setting the minimum timer delay. This section presents a quick
procedure for calculating the timing capacitance requirement. However, for proper operation of the TPS2350,
there is an absolute minimum value of 0.01-
F for CFLT. This minimum requirement overrides any smaller results
Due to the three-phase nature of the load current at turn-on, the load voltage ramp has potentially three distinct
phases. This profile depends on the relative values of load capacitance, input DC potential, maximum current
limit and other factors. The first two phases are characterized by the two different slopes of the current ramp; the
third phase, if required to complete load charging, is the constant-current charging at IMAX. Considering the two
current ramp phases to be one period at an average di/dt simplifies calculation of the required timing capacitor.
For the TPS2350, the typical duration of the soft-start period, tSS, is given by Equation 3.
(3)
where
tSS is the soft-start period in ms
CRAMP is given in F
During this current ramp period, the load voltage magnitude which is attained is estimated by Equation 4.
(4)
where
VLSS is the load voltage reached during soft-start
IAVG is 3.18 A for the TPS2350
CLOAD is the load capacitance in Farads
tSS is the soft-start period in s
The quantity IAVG in Equation 4 is a weighted average of the two charge currents applied to CRAMP during turn-on,
considering the typical output values.
14
Copyright
2003–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS2350
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