參數(shù)資料
型號： TPS2363PFBRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝： PLASTIC, TQFP-48
文件頁數(shù)： 43/44頁
文件大?。?/td> 840K
代理商： TPS2363PFBRG4
SLUS680B – JANUARY 2006 – REVISED JANUARY 2010
www.ti.com
TERMINAL FUNCTIONS (continued)
TERMINAL
NAME
I/O
DESCRIPTION
NO.
TPS2363
MIC2592B
3.3-V channel output, used to monitor the SlotA/B voltage for power good.
When the main power is turned off, there is a 1.2-k
pull-down,
OUT33A/B
3VOUTA/B
16/21
I/O
bleed-down circuit, when all the voltages are below 100 mV slot power off
can be read from the SMBus.
GND
17, 46, 33
Ground
AUXHIA/B are used to select high AUX current, 800 mA. These pins are
pulled up to AUXINA/B with a 10-k
maximum resistor for 800 mA
AUXHIA/B
N/C
18, 19
I
selection. It has an internal 40-k
pull-down resistor so it may be NC or
connected to ground for the default 400 mA VAUXA/B. The AUX high
current feature is only on the TPS2363.
A 110-k
resistor from this pin to ground improves fault timer accuracy.
RFILTER A&B
RFILTER [A&B]
20
I
See fault timer section for more information.
INT is an open drain output, active low when a fault occurs. The SMBus
interrupt mask disables the output. INT is cleared through reset of the
INT
/INT
37
O
status registers. This is described in the SMBus programming section.
This pin should be pulled up 3.3-V or AUXINA/B through an external
10-k
resistor at the end of the bus.
SMBus address selection inputs. These inputs are internally pulled up to
3.3-V or AUXINA/B with a 40-k
resistor; leave the pins open to program
A0, A1, A2
41/40/39
I
a logic one or connect to ground for a zero. The controller reads the
address bits at initialization only.
This active high signal turns on the VAUX slot voltage. Taking this signal
AUXENA/B
45/42
I
low clears a fault on the slot caused by the VAUX voltages. Connect these
pins to ground when using the SMBus interface for control.
This active high signal turned on the main slot voltages. Taking this signal
ONA/B
44/43
I
low clears a fault on the slot caused by the main voltages. Connect these
pins to ground when using the SMBus interface for control.
SMBus clock input. This pin should be pulled up 3.3 V or AUXIN through
SCL
47
I
an external 10-k
resistor at the end of the bus.
SMBus data in/output and address input. This pin should be pulled up
SDA
48
I/O
3.3-V or AUXIN through an external 10-k
resistor at the end of the bus.
8
Copyright 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS2363
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