參數(shù)資料
型號: TPS23753PW
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 0.505 A SWITCHING CONTROLLER, 273 kHz SWITCHING FREQ-MAX, PDSO14
封裝: GREEN, PLASTIC, TSSOP-14
文件頁數(shù): 11/30頁
文件大小: 823K
代理商: TPS23753PW
(
)
( )
BLNK
R
k
t
ns
=
_
(
)
(
)
( )
1000
(
)
SLOPE
D
MAX
S
SL
EX
V
mV
V
mV
D
R
I
A
=
www.ti.com
SLVS853C – JUNE 2008 – REVISED JANUARY 2010
Thermal Considerations
Sources of nearby local PCB heating should be considered during the thermal design. Typical calculations
assume that the TPS23753 is the only heat source contributing to the PCB temperature rise. It is possible for a
normally operating TPS23753 device to experience an OTSD event if it is excessively heated by a nearby
device.
Blanking – RBLNK
The TPS23753 BLNK feature permits programming of the blanking period with specified tolerance. Selection of
the blanking period is often empirical because it is affected by parasitics and thermal effects of every device
between the gate-driver and output capacitors.
There is a critical range of blanking period that is bounded on the short side by erratic operation, and on the long
side by potentially harmful switching-MOSFET and output rectifier currents during a short circuit. The minimum
blanking period prevents the current limit and PWM comparators from being falsely triggered by the inherent
current “spike” that occurs when the switching MOSFET turns on. The maximum blanking period is bounded by
the output rectifier's ability to withstand the currents experienced during a converter output short. A short on the
flyback transformer secondary will cause very large peak MOSFET currents that are worsened by longer
blanking periods. A long blanking time also increases the minimum load required before cycle skipping occurs in
a non-synchronous converter.
The TPS23753 provides a choice between internal fixed and programmable blanking periods. The blanking
period is specified as an increase in the minimum GATE on time over the inherent gate driver and comparator
delays. The default period (see the Electrical Characteristics table) is selected by connecting BLNK to RTN, and
the programmable period is set with a resistor from BLNK to RTN per the following equation.
(5)
For example, a 100 ns period is programmed by a 100 k
resistor. For a brand-new design, it is recommended
that an initial blanking period of 125 ns be designed in. This period should be tuned once the converter is
operational.
Current Slope Compensation
Current-mode control requires addition of a compensation ramp to the sensed inductor (flyback transformer)
current for stability at duty cycles near and over 50%. The TPS23753 has a maximum duty cycle limit of 80%,
permitting the design of wide input-range flyback converters with a lower voltage stress on the output rectifiers.
While the maximum duty cycle is 80%, converters may be designed that run at duty cycles well below 80% for a
narrower, 36 V to 57 V range. The TPS23753 provides a fixed internal compensation ramp that suffices for most
applications. RS (see Figure 22) may be used if the internally provided slope compensation is not enough. It
works with ramp current (IPK = ISL-EX, ~40 μA) that flows out of the CS pin when the MOSFET is on. The IPK
specification does not include the ~3
μA fixed current that flows out of the CS pin.
Most current-mode control papers and application notes define the slope values in terms of VPP/TS (peak ramp
voltage / switching period), however the electrical characteristics table specifies the slope peak (VSLOPE) based
on an 80% duty cycle. Assuming that the desired slope, VSLOPE-D (in mV/period), is based on the full period,
compute RS per the following equation where VSLOPE, DMAX, and ISL-EX are from the electrical characteristics table
with voltages in mV, current in
μA, and the duty cycle is unitless (e.g. DMAX = 0.8).
(6)
Copyright 2008–2010, Texas Instruments Incorporated
19
Product Folder Link(s): TPS23753
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相關代理商/技術參數(shù)
參數(shù)描述
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