Dt +
C
O
V
VCC
I
CHARGE
G
GAT E
RS
VC C
t
C
=
I
C
V
-
÷
è
SLVS503C
– NOVEMBER 2003 – REVISED SEPTEMBER 2011
STEP 6. Choose R5, R6, and C1
R5 is intended to suppress high-frequency oscillations; a resistor of 10
will serve for most applications but if M1
has a CISS below 200 pF, then use 33 . Applications with larger MOSFETs and short wiring may not require R5.
R6 is required only if the PG output drives a circuit that requires it. It is recommended that the sink current be
less than 2 mA. C1 is a bypass capacitor to help with control of transient voltages, unit emissions, and local
supply noise while in the disabled state. Where acceptable, a value in the range of 0.001
μF to 0.1 μF is
recommended.
STEP 7. Choose D1
Transient voltage suppressor D1 is required in applications where there will be enough energy in the distribution
inductance to cause a voltage surge above the TPS2490/91 rated maximum. Such transients can be caused by
card insertions or shorts on the input or output of the TPS2490/91.
ALTERNATIVE INRUSH DESIGNS
Gate Capacitor (dV/dt) Control
The TPS2490/91 can be used with applications that require constant turn-on currents. The current is controlled
by a single capacitor from the GATE terminal to ground with a series resistor. M1 appears to operate as a source
follower (following the gate voltage) in this implementation. Choose a time to charge,
Δt, based on the output
capacitor, input voltage VI, and desired charge current, ICHARGE. Select ICHARGE to be less than PLIM ÷ VVCC if the
power limit feature is kept. See
SLVC033 for a calculation tool.
(11)
To select the gate capacitance:
(12)
IGATE is the nominal gate charge current. This equation assumes that the MOSFET CGD is the controlling element
as the gate and output voltage rise. CGD is non-linear with applied VDG. An averaged estimate may be made
using the MOSFET VGS vs QG curve. Divide the charge accumulated during the plateau region by the plateau
VGS to get CRS.
Since neither power nor current-limit faults are invoked during turn on, CT can be chosen for fast transient turn off
response using the M1 SOA curve. Choose the single pulse time conservatively from the M1 SOA curve using
maximum operating voltage and maximum trip current. A series resistor of about 1 k
should be used in
conjunction with CG.
PROG Inrush Control
A capacitor can be connected from the PROG pin to ground to reduce the initial current step seen in
Figure 13based on the Typical Application and Corresponding SOA circuit. This method maintains a relatively fast turn-on
time without the drawbacks of a gate-to-ground capacitor that include increased short circuit response time and
less predictable gate clamping.
ADDITIONAL DESIGN CONSIDERATIONS
Use of PG
Use the PG pin to control and coordinate a downstream dc/dc converter. A long time delay is needed to allow CO
to fully charge before the converter starts if this is not done. An undesirable latchup condition can be created
between the TPS2490 output characteristic and the dc/dc converter input characteristic if the converter starts
while CO is still charging; the PG pin is one way to avoid this.
16
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2003–2011, Texas Instruments Incorporated