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Over-Current Protection (OCP)
Power-Supply Remote On/Off (PSON) And
Over-Voltage Protection (OVP)
Under-Voltage Protection (UVP)
SLVS422C – JUNE 2002 – REVISED DECEMBER 2006
If the voltage signals at PGI, VS33, and VS5 rise
above the under-voltage threshold, the open-drain
In bridge, or forward type, off-line switching power
PGO will go high after a delay of 300ms. When the
supplies, usually designed for medium to large
PGI voltage or any of the 3.3V/5V rail drops below
power, the overload protection design needs to be
the under-voltage threshold, PGO will be disabled
very precise. Most of these types of power supplies
immediately.
sense the output current for an overload condition.
The trigger-point needs to be set higher than the
maximum load in order to prevent false turn-on.
Fault Protect Output (FPO)
The
TPS3514
provides
Over-Current
Protection
Since
the
latest
personal
computer
generation
(OCP) for the 3.3V, 5V, and 12V rails. When an
focuses on easy turn-on and power-saving functions,
over-current
condition
appears
at
the
OCP
the PC power supply will require two characteristics.
comparator input pins for more than 73
s, the FPO
One is a DC power-supply remote on/off function;
output goes high and PGO goes low. Also, this fault
the other is standby voltage to achieve very low
condition will be latched until PSON is toggled from
power
consumption
of
the
PC
system.
Thus,
low to high or VDD is removed.
requiring the main power supply to be shut down.
The resistor connected between the RI pin and the
The power-supply remote on/off (PSON) is an
GND pin will create a precise I(REF) for the OCP
active-low signal that turns on all of the main power
function. The formula for choosing the RI resistor is
rails including the 3.3V, 5V, –5V, and –12V power
V(RI)/I(REF). The I(REF) range is from 12.5A to 62.5A.
rails. When this signal is held high by the PC
Three OCP comparators and the I(REF) section are
motherboard or left open-circuited, the signal of the
supplied through the V12 pin. Current drawn from
Fault Protect Output (FPO) also goes high. In this
the VS12 pin is less than 1mA.
condition, the main power rails should not deliver
current and should be held at 0V.
Following is an example on calculating OCP for the
12V rail:
When the FPO signal is held high due to an
RI = V(RI)/I(REF) = 1.15V/20A = 56k
occurring fault condition, the fault status will be
I(REF) C R(IS12) = R(SENSE) I(OCP_TRIP)
latched and the outputs of the main power rails
should not deliver current and should be held at 0V.
I(OCP_TRIP) = 20A 8 560/0.01 = 9.2A
Toggling PSON from low to high will reset the fault
C = Current Ratio (typically = 8)
protection latch. During this fault condition, only the
standby power is not affected.
When PSON goes from high to low or low to high,
The Over-Voltage Protection (OVP) of the TPS3514
the 38ms debounce block will prevent a glitch on the
monitors 3.3V, 5V, and 12V. When an over-voltage
input from disabling/enabling the FPO output. During
condition appears at one of the 3.3V, 5V, or 12V
the HIGH to LOW transition, the under-voltage
input pins for more than 73
s, the FPO output goes
function is disabled to prevent turn-on failure.
high and PGO goes low. Also, this fault condition will
be latched until PSON is toggled from low-to-high or
Power should be delivered to the rails only if the
VDD is removed.
PSON signal is held at ground potential, thus, FPO is
active low. The FPO pin can be connected to 5VDC
During fault conditions, most power supplies have
(or up to 15VDC) through a pull-up resistor.
the potential to deliver higher output voltages than
those normally specified or required. In unprotected
equipment, it is possible for output voltages to be
high enough to cause internal or external damage of
The TPS3514 provides Under-Voltage Protection
the system. To protect the system under these
(UVP) for the 12V rail and Under-Voltage Detect
abnormal conditions, it is common practice to provide
(UVD)
for
the
3.3V
and
5V
rails.
When
an
over-voltage protection within the power supply.
under-voltage condition appears at the VS12 input
pin for more than 150
s, the FPO output goes high
and PGO goes low. Also, this fault condition will be
latched until PSON is toggled from low to high or VDD
is removed.
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