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參數(shù)資料
| 型號： | TPS40077PWPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | GREEN, PLASTIC, HTSSOP-16 |
| 文件頁數(shù)： | 15/43頁 |
| 文件大?。?/td> | 847K |
| 代理商： | TPS40077PWPR |
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f
SW +
T
J*TA
qJA VDD
* IQ
2
Qg
(Hz)
(17)
BOOST DIODE
GROUNDING AND BOARD LAYOUT
SYNCHRONOUS RECTIFIER CONTROL
SLUS714D – JANUARY 2007 – REVISED APRIL 2009 ..................................................................................................................................................... www.ti.com
The TPS40077 series has internal diodes to charge the boost capacitor connected from SW to BOOST. The drop
across these diodes is rather large, 1.4 V nominal, at room temperature. If this drop is too large for a particular
application, an external diode may be connected from DBP (anode) to BOOST (cathode). This provides
significantly improved gate drive for the high-side FET, especially at lower input voltages.
The TPS40077 provides separate signal ground (SGND) and power ground (PGND) pins. Care should be given
to proper separation of the circuit grounds. Each ground should consist of a plane to minimize its impedance, if
possible. The high-power noisy circuits such as the output, synchronous rectifier, MOSFET driver decoupling
capacitor (DBP), and the input capacitor should be connected to PGND plane.
Sensitive nodes such as the FB resistor divider and RT should be connected to the SGND plane. The SGND
plane should only make a single-point connection to the PGND plane. It is suggested that the SGND pin be tied
to the copper area for the thermal pad underneath the chip. Tie the PGND to the thermal-pad copper area as
well, and make the connection to the power circuit ground from the PGND pin. Reference the output voltage
divider to the SGND pin.
Component placement should ensure that bypass capacitors (LVPB and DBP) are located as close as possible
to their respective power and ground pins. Also, sensitive circuits such as FB, RT and ILIM should not be located
near high-dv/dt nodes such as HDRV, LDRV, BOOST, and the switch node (SW). Failure to follow careful layout
practices results in suboptimal operation. More detailed information can be found in the TPS40077EVM User's
Guide (SLVU192).
Table 2 describes the state of the rectifier MOSFET control under various operating conditions.
Table 2. Synchronous Rectifier MOSFET States
SYNCHRONOUS RECTIFIER OPERATION DURING
FAULT
SOFT-START
NORMAL
(FAULT RECOVERY IS SAME
OVERVOLTAGE
AS SOFT-START)
Turns OFF only at start of next
Off until first high-side pulse is
Turns off at the start of a new
cycle only if the pulse width
detected, then on when high-side
cycle. Turns on when the
OFF
modulator duty cycle is greater
MOSFET is off
high-side MOSFET is turned off
than zero. Otherwise, stays ON
For proper operation, the total gate charge of the MOSFET connected to LDRV should be less than 50 nC.
22
Copyright 2007–2009, Texas Instruments Incorporated
Product Folder Link(s) :TPS40077
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