EN
COMP
VOUT
SC Threshold Configured
(1.15 ms)
Compensation Network Zeroed
(1.15 ms)
Soft-Start Time (5.5 ms)
UDG-08099
TI Information — Selective Disclosure
www.ti.com
SLUS886 – NOVEMBER 2008
UVLO
When the input voltage is below the UVLO threshold, the device holds all gate drive outputs in the low (OFF)
state. When the input rises above the UVLO threshold, and the EN pin is above the turn ON threshold, the
oscillator begins to operate and the start-up sequence is allowed to begin. The UVLO level is internally fixed at
4.2 V.
Startup Sequence and Timing
The TPS40197 startup sequence is as follows. After input power is applied, the 5-V onboard regulator initiates.
Once this regulator comes up, the device goes through a period where it samples the impedance at the COMP
pin and determines the short-circuit protection threshold voltage, by placing 400 mV on the COMP pin for
approximately 1.15 ms. During this time, the current is measured and compared against internal thresholds to
select the short circuit protection threshold. After this, the COMP pin is brought low for 1.15 ms. This ensures
that the feedback loop is preconditioned at startup and no sudden output rise occurs at the output of the
converter when the converter is allowed to start switching. After these initial 2.3 ms, the internal soft-start circuitry
is engaged and the converter is allowed to start as shown in
Figure 15.Figure 15. Startup Sequence
Selecting the Short Circuit Current
A short circuit in the TPS40197 is detected by sensing the voltage drop across the low-side FET when it is on,
and across the high-side FET when it is on. If the voltage drop across either FET exceeds the short-circuit
threshold in any given switching cycle, a counter increments one count. If the voltage across the high-side FET
was higher than the short circuit threshold, that FET is turned off early. If the voltage drop across either FET
does not exceed the short circuit threshold during a cycle, the counter is decremented for that cycle. If the
counter fills up (a count of 7) a fault condition is declared and the drivers turn off both MOSFETs. After a timeout
of approximately 50 ms, the controller attempts to restart. If a short circuit continues at the output, the current
quickly ramps up to the short-circuit threshold and another fault condition is declared and the process of waiting
for the 50 ms and attempting to restart repeats. The low-side threshold increases as the low-side on time
decreases due to blanking time and comparator response time. See
Figure 13 for changes in the threshold as
the low-side FET conduction time decreases.
Copyright 2008, Texas Instruments Incorporated
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