- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98281 > TPS40211DRCTG4 (TEXAS INSTRUMENTS INC) SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO10 PDF資料下載
參數(shù)資料
| 型號： | TPS40211DRCTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | GREEN, PLASTIC, SON-10 |
| 文件頁數(shù)： | 8/47頁 |
| 文件大?。?/td> | 1375K |
| 代理商： | TPS40211DRCTG4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
(
)
f
VDD
SW
ISNS(max)
OUT
D
IN
V
L
R
60
V
=
+
-
f
ON
SW
D
t
=
IFLT
ON
R
C
0.1 t
=
SLUS772D – MARCH 2008 – REVISED APRIL 2010
www.ti.com
Since the slope compensation ramp must be at least half, and preferably equal to the down slope of the current
sense waveform seen at the pulse width modulator, a maximum value is placed on the current sense resistor
when operating in continuous mode at 50% duty cycle or greater. For design purposes, some margin should be
applied to the actual value of the current sense resistor. As a starting point, the actual resistor chosen should be
80% or less that the value calculated in Equation 10. This equation calculates the resistor value that makes the
slope compensation ramp equal to one half of the current ramp downslope. Values no more than 80% of this
result would be acceptable.
(10)
Where:
Se is the slope of the voltage compensating ramp applied to the pulse width modulator in V/s
f SW is the switching frequency in Hz
VVDD is the voltage at the VDD pin in V
m2 is the down slope of the current sense waveform seen at the pulse width modulator in V/s
RISNS is the value of the current sense resistor in
VOUT is the converter output voltage VIN is the converter power stage input voltage
It is possible to increase the voltage compensation ramp slope by connecting the VDD pin to the output voltage
of the converter instead of the input voltage as shown in Figure 23. This can help in situations where the
converter design calls for a large ripple current value in relation to the desired output current limit setting.
NOTE
Connecting the VDD pin to the output voltage of the converter affects the startup voltage
of the converter since the controller undervoltage lockout (UVLO) circuit monitors the VDD
pin and senses the input voltage less the diode drop before startup. The effect is to
increase the startup voltage by the value of the diode voltage drop.
If an acceptable RISNS value is not available, the next higher value can be used and the signal from the resistor
divided down to an acceptable level by placing another resistor in parallel with CIFLT .
Current Sense Filtering
In most cases, a small filter placed on the ISNS pin improves performance of the converter. These are the
components RIFLT and CIFLT in Figure 23. The time constant of this filter should be approximately 10% of the
nominal pulse width of the converter. The pulse width can be found using Equation 11.
(11)
The suggested time constant is then
(12)
The range of RIFLT should be from about 1 k to 5 k for best results. Higher values can be used but this raises
the impedance of the ISNS pin connection more than necessary and can lead to noise pickup issues in some
layouts. CIFLT should be located as close as possible to the ISNS pin as well to provide noise immunity.
Soft Start
The soft-start feature of the TPS40210/11 is a closed loop soft start, meaning that the output voltage follows a
linear ramp that is proportional to the ramp generated at the SS pin. This ramp is generated by an internal
resistor connected from the BP pin to the SS pin and an external capacitor connected from the SS pin to GND.
The SS pin voltage (VSS) is level shifted down by approximately VSS(ofst) (approximately 700 mV) and sent to one
of the “+” (the “+” input with the lowest voltage dominates) inputs of the error amplifier. When this level shifted
voltage (VSSE) starts to rise at time t1 (see Figure 24), the output voltage the controller expects, rises as well.
Since VSSE starts at near 0 V, the controller attempts to regulate the output voltage from a starting point of zero
16
Copyright 2008–2010, Texas Instruments Incorporated
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TPS40210DGQG4 | SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO10 |
| TPS40304ADRCT | SWITCHING CONTROLLER, PQCC10 |
| TPS40304ADRCR | SWITCHING CONTROLLER, PQCC10 |
| TPS5100IPWRG4 | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| TPS5100PWLE | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS40211EVM-352 | 功能描述:電源管理IC開發(fā)工具 TPS40211EVM-352 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS40211EVM-352 | 制造商:Texas Instruments 功能描述:EVAL BOARD, TPS40211 ADJ 700mA NON SYS B |
| TPS40211QDGQRQ1 | 功能描述:LED照明驅(qū)動器 WIDE INP CRNT MODE BOOST CONTROLLER RoHS:否 制造商:STMicroelectronics 輸入電壓:11.5 V to 23 V 工作頻率: 最大電源電流:1.7 mA 輸出電流: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:SO-16N |
| TPS40-22 | 制造商:TOTAL-POWER 制造商全稱:TOTAL-POWER 功能描述:40 WATT OPEN - FRAME SWITCHING POWER SUPPLY |
| TPS40222 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1.6-A, 1.25-MHz BUCK CONVERTER IN A 3 mm 3 mm SON PACKAGE |
發(fā)布緊急采購，3分鐘左右您將得到回復。