參數(shù)資料
型號(hào)： TPS5300DAP
廠商： TEXAS INSTRUMENTS INC
元件分類： 穩(wěn)壓器
英文描述： 3.3 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO32
封裝： GREEN, PLASTIC, HTSSOP-32
文件頁(yè)數(shù)： 21/23頁(yè)
文件大小： 476K
代理商： TPS5300DAP
TPS5300
SLVS334A DECEMBER 2000 REVISED SEPTEMBER 2001
7
www.ti.com
electrical characteristics over recommended operating free-air temperature range, 0 < TJ < 125°C,
VIN = 3 V 28 V (see test circuits) (unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PSM/LATCH Fault Latch Disable
V(No_Latch/PSM)
Disable latch threshold
PSM enabled
VBIAS + 0.7
V
V(No_Latch)
Disable latch threshold
PSM disabled
ANAGND 0.7
V
V(Latch_enabled)
Enable latch threshold
ANAGND
VBIAS
V
Thermal Shutdown
T(OTP)
Over temperature trip
point
See Note 2
155
°C
T(hyst)
Hysteresis
See Note 2
25
°C
Dynamic VID Change (No current limit)
ΙtSRC/SNK
Voltage change timing
current
VCC = 5 V, V(ref1) = 1.35 V,
DT_SET = 0.925 VSRC/VSNK
14
A
Output Drivers (see Note 4)
IO(src_TG)
Duty cycle < 2%, tpw < 100
s,
V(BOOT) – V(PH) = 4.5 V,
V(TG) V(PH) = 0.5 V (src)
1.2
2
A
IO(sink_TG)
Peak output current (see
Notes 2 and 4)
Duty cycle < 2%, tpw < 100
s,
V(BOOT) – V(PH) = 4.5 V,
V(TG) V(PH) = 4 V (sink)
1.2
3.3
A
IO(src_BG)
Notes 2 and 4)
Duty cycle < 2%, tpw < 100
s,
VCC = 4.5 V, V(BG) = 0.5 V (src)
1.4
2
A
IO(sink_BG)
Duty cycle < 2%, tpw < 100
s,
VCC = 4.5 V, V(BG) = 4 V (src)
1.3
3.3
A
ro(src_TG)
V(BOOT) – V(PH) = 4.5 V, V(TG) = 4 V
2.5
ro(sink_TG)
Output resistance (see
Note 4)
V(BOOT) – V(PH) = 4.5 V, V(TG) = 0.5 V
1.5
ro(src_BG)
Output resistance (see
Note 4)
VCC = 4.5 V, V(BG) = 4 V
2.5
ro(sink_BG)
VCC = 4.5 V, V(BG) = 0.5 V
1.5
tf(TG)
TG fall time (AC) (see
Note 5)
Cl = 3.3 nF, V(BOOT) = 4.5 V,
10
ns
tr(TG)
TG rise time (AC) (see
Note 5)
Cl = 3.3 nF, V(BOOT) = 4.5 V,
V(PH) = GND
10
ns
tf(BG)
BG fall time (AC) (see
Note 5)
Cl = 3.3 nF, VCC = 4.5 V
10
ns
tr(BG)
BG rise time (AC) (see
Note 5)
Cl = 3.3 nF, VCC = 4.5 V
10
ns
High-Side Driver Quiescent Current
IQ(highdrq1)
Highdrive (TG)
quiescent current
VR_ON grounded, or VCC below UVLO
threshold; V(BOOT) = 5 V,
PH grounded (see Note 2)
2
A
NOTES:
2. Ensured by design, not production tested.
4. The pulldown (sink) circuit of the high-side driver is a MOSFET transistor referenced to DRVGND. The driver circuits are bipolar
and MOSFET transistors in parallel. The peak output current rating is the combined current rating from the bipolar and MOSFET
transistors. The output resistance is the rds(on) of the MOSFET transistor when the voltage on the driver output is less than the
saturation voltage of the bipolar transistor.
5. Rise and fall times are measured from 10% to 90% of pulsed values.
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