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參數(shù)資料
| 型號： | TPS5300DAPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 3.3 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO32 |
| 封裝： | GREEN, PLASTIC, HTSSOP-32 |
| 文件頁數(shù)： | 2/23頁 |
| 文件大小： | 476K |
| 代理商： | TPS5300DAPR |
TPS5300
SLVS334A DECEMBER 2000 REVISED SEPTEMBER 2001
10
www.ti.com
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
VHYST
8
I
Ripple regulator hysteresis set terminal. The hysteresis is set with a resistor divider from VREFB to ANGND.
The hysteresis voltage window will be
± the voltage between VREFB and VHYST.
VID0
27
I
VID1
26
I
Voltage identification inputs 0, 1, 2, 3, and 4. These terminals are digital inputs that set the output voltage of
VID2
25
I
Voltage identification inputs 0, 1, 2, 3, and 4. These terminals are digital inputs that set the output voltage of
the converter. The code pattern for setting the output voltage is located in the terminal functions table. These
terminals are internally pulled up to VBIAS.
VID3
24
I
the converter. The code pattern for setting the output voltage is located in the terminal functions table. These
terminals are internally pulled up to VBIAS.
VID4
23
I
VREFB
7
O
Buffered ripple regulator reference voltage from VID network
VR_ON
22
I
Enables the drive signals to the MOSFET drivers. The comparator input can be used to monitor voltage,
such as the linear regulators’ input supply using a resistor divider.
VSENSE_CLK
2
I
CLK feedback voltage sense. Connect to CLK linear regulator output voltage to regulate.
VSENSE_CORE
5
I
Feedback voltage sense input for the core. Connect to ripple regulator output voltage to sense and regulate
output voltage. It is recommended that an RC low-pass filter be connected at this pin to filter high-frequency
noise.
VSENSE_IO
31
I
I/O feedback voltage sense. Connect to I/O linear regulator output voltage to regulate.
detailed description
reference/voltage identification
The reference /voltage programming (VP) section consists of a temperature-compensated, bandgap reference
and a 5-bit voltage selection network. The five VID pins are inputs to the VID selection network and are TTL
compatible inputs that are internally pulled up to VCC with pullup resistors. The internal reference voltage can
be programmed from 0.925 V to 2 V with the VID pins. The VID codes are listed in Table 1. The output voltage
of the VP network, Vref, is within ±1.5% of the nominal setting. The ±1.5% tolerance is over the full VP range
of 0.925 V to 2 V, and includes a junction temperature range of 0
°C to 125°C, and a VCC range of 4.5 V to 5.5 V.
The output of the reference/VP network is indirectly brought out through a buffer to the VREFB pin. The voltage
on this pin will be within
±5 mV of Vref. It is not recommended to drive loads with VREFB, other than setting the
hysteresis of the hysteretic comparator, because the current drawn from VREFB sets the charging current for
the slowstart capacitor. Refer to the slowstart section for additional information.
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