參數(shù)資料
型號(hào): TPS53127RGER
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: DUAL SWITCHING CONTROLLER, 700 kHz SWITCHING FREQ-MAX, PQCC24
封裝: GREEN, PLASTIC, VQFN-24
文件頁(yè)數(shù): 29/29頁(yè)
文件大小: 861K
代理商: TPS53127RGER
www.ti.com
SLVSA93 – MARCH 2010
DETAILED DESCRIPTION
PWM Operation
The main control loop of the TPS53127 is an adaptive on-time pulse width modulation (PWM) controller using a
proprietary D-CAP2 mode control. D-CAP2 mode control combines constant on-time control with an internal
compensation circuit for pseudo-fixed frequency and low external component count configuration with both low
ESR and ceramic output capacitors. It is stable even with virtually no ripple at the output.
At the beginning of each cycle, the synchronous high-side MOSFET is turned on. After an internal one-shot timer
expires, this MOSFET is turned off. When the feedback voltage falls below the reference voltage, the one-shot
timer is reset and the high-side MOSFET is turned back on. The one shot is set by the converter input voltage
VIN, and the output voltage VO, to maintain a pseudo-fixed frequency over the input voltage range. An internal
ramp is added to the reference voltage to simulate output ripple, eliminating the need for ESR induced output
ripple from D-CAP mode control.
Drivers
Each channel of the TPS53127 contains two high-current resistive MOSFET gate drivers. The low-side driver is a
PGND referenced, VREG5 powered driver designed to drive the gate of a high-current, low RDS(ON) N-channel
MOSFET whose source is connected to PGND. The high-side driver is a floating SWx referenced VBST powered
driver designed to drive the gate of a high-current, low RDS(ON) N-channel MOSFET. To maintain the VBST
voltage during the high-side driver ON time, a capacitor is placed from SWx to VBSTx. Each driver draws
average current equal to gate charge (Qg at Vgs = 5 V) times switching frequency (fSW).
To prevent cross-conduction, there is a narrow dead-time when both high-side and low-side drivers are OFF
between each driver transition. During this time the inductor current is carried by one of the MOSFETs body
diodes.
PWM Frequency and Adaptive On-Time Control
TPS53127 employs adaptive on-time control scheme and does not have a dedicated on board oscillator.
TPS53127 runs with pseudo-constant frequency by using the input voltage and output voltage to set the on-time
one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the output voltage.
Therefore, when the duty ratio is VOUT/VIN, the frequency is constant.
5-Volt Regulator
The TPS53127 has an internal 5-V low-dropout (LDO) regulator to provide a regulated voltage for all both drivers
and the IC's internal logic. A high-quality 4.7-mF or greater ceramic capacitor from VREG5 to GND is required to
stabilize the internal regulator. An internal 10-
resistor from VREG5 filters the regulator output to the IC's
analog and logic input voltage, V5FILT. An additional high-quality 1.0-mF ceramic capacitor is required from
V5FILT to GND to filter switching noise from VREG5.
Soft Start
The TPS53127 has a programmable soft-start . When the ENx pin becomes high, 2.0-mA current begins charging
the capacitor connected from the SS pin to GND. The internal reference for the D-CAP2 mode control
comparator is overridden by the soft-start voltage until the soft-start voltage is greater than the internal reference
for smooth control of the output voltage during start up.
Pre-Bias Support
The TPS53127 supports pre-bias start-up without sinking current from the output capacitor. When enabled, the
low-side driver is held off until the soft-start commands a voltage higher than the pre-bias level (internal soft-start
becomes greater than feedback voltage (VFB)), then the TPS53127 slowly activates synchronous rectification by
limiting the first DRVL pulses with a narrow on-time. This limited on-time is then incremented on a cycle-by-cycle
basis until it coincides with the full 1-D off-time. This scheme prevents the initial sinking of current from the
pre-bias output, and ensure that the output voltage (VOUT) starts and ramps up smoothly into regulation and the
control loop is given time to transition from pre-biased start-up to normal mode operation.
Copyright 2010, Texas Instruments Incorporated
9
Product Folder Link(s): TPS53127
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