參數(shù)資料
型號: TPS62677YFDR
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: SWITCHING REGULATOR, PBGA6
封裝: 0.40 MM HEIGHT, DSBGA-6
文件頁數(shù): 24/28頁
文件大小: 750K
代理商: TPS62677YFDR
GND
A1
B1
C1
A2
B2
C2
FB
SW
MODE
VIN
EN
TPS6267x
CSP-6
(TOP VIEW)
MODE
C1
A2
B2
C2
A1
B1
VIN
EN
GND
FB
SW
TPS6267x
CSP-6
(BOTTOMVIEW)
GateDriver
Anti
Shoot-Through
PowerSaveMode
SwitchingLogic
+
-
Frequency
Control
FB
R1
R2
SW
GND
Soft-Start
EN
VIN
CurrentLimit
Detect
Undervoltage
Lockout
BiasSupply
Bandgap
Thermal
Shutdown
NegativeInductor
CurrentDetect
VIN
MODE
V
= 0.8 V
REF
VREF
www.ti.com
SLVS952 – APRIL 2010
PIN ASSIGNMENTS
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
FB
C1
I
Output feedback sense input. Connect FB to the converter’s output.
VIN
A2
I
Power supply input.
This is the switch pin of the converter and is connected to the drain of the internal Power
SW
B1
I/O
MOSFETs.
This is the enable pin of the device. Connecting this pin to ground forces the device into
shutdown mode. Pulling this pin to VI enables the device. If an external clock (4MHz to 27MHz) is
EN
B2
I
detected the device will automatically power up. This pin must not be left floating and must be
terminated.
This is the mode selection pin of the device. This pin must not be left floating and must be
terminated.
MODE = LOW: The device is operating in regulated frequency pulse width modulation mode
MODE
A1
I
(PWM) at high-load currents and in pulse frequency modulation mode (PFM) at light load
currents.
MODE = HIGH: Low-noise mode enabled, regulated frequency PWM operation forced.
GND
C2
Ground pin.
FUNCTIONAL BLOCK DIAGRAM
Copyright 2010, Texas Instruments Incorporated
5
Product Folder Link(s): TPS6267x
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