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參數(shù)資料
| 型號： | TPS650531IRGERQ1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC24 |
| 封裝： | 4 X 4 MM, GREEN, PLASTIC, VQFN-24 |
| 文件頁數(shù)： | 20/26頁 |
| 文件大?。?/td> | 686K |
| 代理商： | TPS650531IRGERQ1 |
SLVSAW1
– JUNE 2011
RECOMMENDED OPERATING CONDITIONS (continued)
MIN
NOM
MAX
UNIT
TA
Operating ambient temperature range
–40
85
°C
TJ
Operating junction temperature range
–40
125
°C
RCC
Resistor from battery voltage to VCC used for filtering
(2)
1
10
(2)
Up to 2 mA can flow into VCC when both converters are running in PWM, this resistor causes the UVLO threshold to be shifted
accordingly.
ELECTRICAL CHARACTERISTICS
Vcc = VINDCDC1/2 = 3.6V, EN = Vcc, MODE = GND, L = 2.2μH, COUT = 22μF, TA = –40°C to 85°C typical values
are at TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
Vcc
Input voltage range
2.5
6
V
One converter, IOUT = 0 mA.PFM mode enabled
(Mode = GND) device not switching,
20
30
μA
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1= EN_LDO2 = EN_LDO3 = GND
Two converters, IOUT = 0 mA, PFM mode enabled
Operating quiescent current
(Mode = 0) device not switching,
IQ
Total current into VCC, VINDCDC1/2,
32
40
μA
EN_DCDC1 = Vin AND EN_DCDC2 = Vin;
VINLDO1, VINLDO2/3
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
One converter, IOUT = 0 mA, PFM mode enabled
(Mode = GND) device not switching,
145
210
μA
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = Vin
One converter, IOUT = 0 mA, Switching with no load
(Mode = Vin), PWM operation
0.85
mA
EN_DCDC1 = Vin OR EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
IQ
Operating quiescent current into VCC
Two converters, IOUT = 0 mA, Switching with no load
(Mode = Vin), PWM operation
1.25
mA
EN_DCDC1 = Vin AND EN_DCDC2 = Vin;
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
EN_DCDC1 = EN_DCDC2 = GND
I(SD)
Shutdown current
9
12
μA
EN_LDO1 = EN_LDO2 = EN_LDO3 = GND
Undervoltage lockout threshold for DCDC
UVLO
Voltage at VCC
1.8
2
V
converters and LDOs
EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2, EN_LDO3, MODE
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
VIH
High-level input voltage
1.2
VCC
V
EN_LDO3
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
VIL
Low-level input voltage
0
0.4
V
EN_LDO3
MODE, EN_DCDC1, EN_DCDC2, EN_LDO1, EN_LDO2,
IIN
Input bias current
0.01
1
μA
EN_LDO3, MODE = GND or VIN
POWER SWITCH
VINDCDC1/2 = 3.6 V
280
630
P-channel MOSFET
rDS(on)
DCDC1, DCDC2
m
on resistance
VINDCDC1/2 = 2.5 V
400
ILD_PMOS
P-channel leakage current
V(DS) = 6 V
1
μA
VINDCDC1/2 = 3.6 V
220
450
N-channel MOSFET
rDS(on)
DCDC1, DCDC2
m
on resistance
VINDCDC1/2 = 2.5 V
320
ILK_NMOS
N-channel leakage current
V(DS) = 6 V
7
10
μA
DCDC1
1.1
1.4
1.8
Forward Current Limit
DCDC2
0.85
1
1.15
PMOS (High-Side)
(TPS65053-Q1 )
I(LIMF)
2.5 V
≤ VIN ≤ 6 V
A
and NMOS (Low
DCDC2
side)
(TPS650531-Q1 ,
1.19
1.4
1.65
TPS650532-Q1)
TSD
Thermal shutdown
Increasing junction temperature
150
°C
Thermal shutdown hysteresis
Decreasing junction temperature
20
°C
Copyright
2011, Texas Instruments Incorporated
3
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