參數(shù)資料
型號: TPS65167ARHARG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 4.9 A SWITCHING REGULATOR, 900 kHz SWITCHING FREQ-MAX, PQCC40
封裝: 6 X 6 MM, GREEN, PLASTIC, MO-220VJJD-2, QFN-40
文件頁數(shù): 38/41頁
文件大小: 1270K
代理商: TPS65167ARHARG4
www.ti.com
SLVS760C – APRIL 2007 – REVISED MARCH 2008
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
DRVN
13
I/O
Drive pin of the negative charge pump.
GND
14
Power ground for the positive charge pump
C1P
15
Positive charge pump flying capacitor
C1N
16
Positive charge pump flying capacitor
C2P
17
Positive charge pump flying capacitor
C2N
18
Positive charge pump flying capacitor
Power supply pin of the positive charge pump and control voltage for the boost regulator Vs. Connect this
SUP
19
I/O
pin with a short and wide PCB trace to the output of the boots converter
FBP
20
Feedback of the positive charge pump
POUT
21
Output of the positive charge pump converter
VGH
22
Output of the high voltage switch and gate shaping function block
DRN
23
Termination of the low side switch of the gate voltage shaping block
Control input for the gate voltage shaping block. Connect this pin to REGOUT if the gate voltage shaping
CTRL
24
I
function is not used.
Connecting a capacitor from this pin to GND allows to set the delay time between the boost converter Vs
GDLY
25
O
and VGH. Note that VGH is controlled by CTRL as well.
This is the enable pin of the boost converter Vs, negative charge pump VGL and positive charge pump
EN
26
I
POUT. This pin is a dual function pin. EN can be held high if no start-up delay is desired or a capacitor can
be connected to this pin. The capacitor determines the start-up delay time.
Logic control input to force the device into High Voltage Stress Test. With HVS = low the high voltage stress
HVS
27
I
test disabled. With the TPS65167 and HVS = high the high voltage stress test is enabled for Vs and for
VGH. With the TPS65167A and HVS = high the high voltage stress test is enabled for Vs only.
This resistor sets the voltage of the boost converter Vs when the High Voltage Stress test is enabled. (HVS
RHVS
28
I/O
= high). With HVS = high the RHVS pin is pulled to GND which sets the voltage for the boost converter
during High Voltage Stress. When HVS is disabled (HVS = low) the RHVS pin is high impedance.
FB
29
I
Feedback of the boost converter Vs
Compensation for the regulation loop of the boost converter generating Vs. Typically a 22 nF compensation
COMP
30
I/O
capacitor is connected to this pin.
This is the output of the internal device temperature sensor. The output voltage is proportional to the chip
TEMP
31
O
temperature.
PGND
32, 33
Power Ground for the boost converter Vs
SW
34, 35
I/O
Switch pin of the boost converter generating Vs
GD
36
I/O
Gate drive. This pin controls the external isolation MOSFET.
GND
37
Analog Ground for the internal reference
AVIN
38
I
Analog input voltage of the device. Bypass this pin with a 0.47
F bypass capacitor.
FBLDO
39
I
Feedback of the LDO controller
BASE
40
I/O
BASE drive of the external PNP transistor
PowerPAD
Analog GND for the internal reference
6
Copyright 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65167 TPS65167A
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