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參數(shù)資料
| 型號： | TPS65182RGZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 7 X 7 MM, 0.9 MM, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 865K |
| 代理商： | TPS65182RGZT |
SLEEP
ACTIVE
Rails
= ON
I2 C
= YES
POWER DOWN
NOTES
:
||, &
= logic OR
, logic AND
.
( ), ( )
= rising edge
, falling edge
.
FAULT
= UVLO
|| TSD
( thermal shutdown
)|| BOOST UV
.
(*)
= Device follows default power
- up /down sequence
.
(**)
= Power sequencing is GPIO controlled
.
WAKEUP
( ) &
All PWRx pins
= low
All rails
= OFF
I2 C
= NO
Battery removed
STANDBY
WAKEUP
= high
&
any PWRx pin
( )
(**)
)
All rails
= OFF
I2 C
= YES
WAKEUP
= high
&
all PWRx pins
= ( )
(**)
||
FAULT
(**)
)
WAKEUP
( )
W
A
K
E
U
P
(
)
&
a
n
y
P
W
R
x
p
in
=
h
ig
h
(*
)
W
A
K
E
U
P
(
)
(*
)
SLVSAA2C – MARCH 2010 – REVISED OCTOBER 2010
www.ti.com
Figure 1. Global State Diagram
WAKE-UP AND POWER UP SEQUENCING
The TPS65182/TPS65182B supports a default power-up sequence supporting E Ink Vizplex displays. It also
offers full user control of the power-up sequence through GPIO control using the PWR3, 2, 1, 0 pins. Using GPIO
control, the output rails are enabled/disabled in the order in which the PWRx pins are asserted/de-asserted,
respectively, and the power-up timing is controlled by the host only. Rails are in regulation 2 ms after their
respective PWRx pin has been asserted with the exception of the first rail, which takes 6 ms to power up. The
additional time is needed to power up the positive and inverting buck-boost regulator which need to be turned on
before any other rail can be enabled. Once all rails are enabled and in regulation the PWR_GOOD pin is
released (pin status = HiZ and power good line is pulled high by external pull-up resistor). The PWRx pins are
assigned to the rails as follows:
PWR0: LDO2 (VNEG) and VCOM
PWR1: CP2 (VEE)
PWR3: LDO2 (VPOS)
PWR4: CP1 (VDDH)
Rails are powered down whenever the host de-asserts the respective PWRx pin, and once all rails are disabled
the device enters STANDBY mode. The next step is then to de-assert the WAKEUP pin to enter SLEEP mode
which is the lowest-power mode of operation.
10
Copyright 2010, Texas Instruments Incorporated
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