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參數(shù)資料
| 型號： | TPS65510RGTRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC16 |
| 封裝： | 3 X 3 MM, GREEN, PLASTIC, QFN-16 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大?。?/td> | 929K |
| 代理商： | TPS65510RGTRG4 |
ELECTRICAL CHARACTERISTICS
SLLS917 – SEPTEMBER 2008 .......................................................................................................................................................................................... www.ti.com
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V(VO_BT): 3.6 V, VOUT: No load
ICC1
Consumption current at VO_BT
60
100
A
V(PWMON): AGND (PFM mode)
V(VO_BT): 5 V, VOUT: No load
ICC2
Consumption current at VO_BT
250
350
A
V(PWMON): VOUT (PWM mode)
V(VO_BT) : 3.6 V, V(VBK): 3 V
ICC3
Consumption current at VBK
0.1
1
A
VOUT: No load
VO_BT: Open, V(VBK): 3 V
ICC4
Consumption current at VBK
2.5
5
A
VOUT: No load, V(V_CTRL): VOUT
VO_BT: Open, V(VBK): 3 V
ICC5
Consumption current at VBK
1.2
3
A
VOUT: No load, V(V_CTRL): AGND
ICC6
Consumption current at VBAT
V(VBAT): 3.6 V, V(VO_BT): 3.5 V
5
10
A
I(SINK_CS)
Sink current at CS
V(CS): 0.5 V, CS pin: Low-Z
1
1.5
mA
I(LEAK_CS)
Leakage current at CS
V(CS): 5.5 V, CS pin: Hi-Z
1
A
I(SINK_XRESE
Sink current at XRESET
V(XRESET): 0.5 V, XRESET pin: Low-Z
1
1.5
mA
T)
I(LEAK_XRESE
Leak current at XRESET
V(XRESET): 5.5 V, XRESET pin: Hi-Z
1
A
T)
I(LEAK_VBK)
Leak current at VBK
V(VO_BT): 5.5 V, V(VBK): 0 V
1
A
UVLO/CS detection level at
V(UVLO_DET)
V(VBAT): from 0 V to 5.5 V
2.50
2.70
2.90
V
VBAT
V(UVLO_HYS)
UVLO/CS hysteresis at VBAT
V(VBAT): from 5.5 V to 0 V
–250
–200
–150
mV
V(CS_DET)
CS detection level at VO_BT
V(VO_BT): from 5 V to 0 V
3.071
3.150
3.229
V
V(CS_HYS)
CS hysteresis at VO_BT
V(VO_BT): from 0 V to 5 V
50
100
150
mV
V(XRESET_DE
XRESET detection level
V(VOUT): from 3.3 V to 0 V
2.048
2.100
2.153
V
T)
V(XRESET_HY
XRESET hysteresis
V(VOUT): from 0 V to 3.3 V
50
100
150
mV
S)
Change the power path for
V(SW1)
Monitoring at VO_BT
2.94
3.00
3.06
V
VOUT
V(SW2)
CS output disable level
Monitoring at VOUT
3.072
3.135
3.198
V
V(WAKE_DET) Threshold of WAKE mode
V(VO_BT): from 0 V to 3.6 V
2.38
2.50
2.63
V
V(WAKE_HYS) WAKE mode hysteresis
V(VO_BT): from 3.6 V to 0 V
–150
–100
–50
mV
On resistance between VBK and
VO_BT: Open, V(VBK): 3 V,
R(ON_VBK)
30
60
VOUT
I(VOUT): 2 mA
Thermal shutdown detection
TSD(1)
150
°C
temperature
(1)
Specified by design. Not production tested.
4
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65510
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