
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TPS7348Y electrical characteristics at I
O
= 10 mA, V
I
= 5.85 V, EN = 0 V, C
o
= 4.7
μ
F (CSR
= 1
),
T
J
= 25
°
C, SENSE shorted to OUT (unless otherwise noted)
TEST CONDITIONS
Output voltage
PARAMETER
MIN
TYP
MAX
UNIT
4.85
V
IO = 10 mA,
IO = 100 mA,
IO = 500 mA,
(4.75 V – VO)/IO,
IO = 500 mA
VI = 5.85 V to 10 V,
IO = 5 mA to 500 mA,
IO = 50
μ
A to 500 mA,
VI = 4.75 V
VI = 4.75 V
VI = 4.75 V
VI = 4.75 V,
2.9
Dropout voltage
28
mV
150
Pass-element series resistance
0.28
Input regulation
50
μ
A
≤
IO
≤
500 mA
5.85 V
≤
VI
≤
10 V
5.85 V
≤
VI
≤
10 V
IO = 50
μ
A
IO = 500 mA
9
mV
Output regulation
28
mV
42
mV
Ripple rejection
f = 120 Hz
53
dB
50
Output noise-spectral density
f = 120 Hz
2
μ
V/
√
Hz
Co = 4.7
μ
F
Co = 10
μ
F
Co = 100
μ
F
410
Output noise voltage
10 Hz
≤
f
≤
100 kHz
328
μ
Vrms
212
RESET hysteresis voltage
26
mV
RESET output low voltage
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to Co.
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.
IO(RESET) = –1.2 mA,
VI = 4.12 V
0.2
V