參數(shù)資料
型號(hào): TQ8103
廠商: TriQuint Semiconductor,Inc.
英文描述: 622 Mb/s Clock & Data Recovery
中文描述: 622 Mb / s的時(shí)鐘
文件頁(yè)數(shù): 1/9頁(yè)
文件大小: 194K
代理商: TQ8103
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For additional information and latest specifications, see our website:
www.triquint.com
The TQ8103 is a monolithic clock and data recovery (CDR) IC that receives
NRZ data, extracts the high-speed clock, and presents the separated data
and clock as its outputs. This device is designed specifically for SONET
OC-12 and SDH STM-4 applications at 622 Mb/s.
Its on-chip phase-locked loop (PLL) generates a stable 622.08 Mb/s
reference based upon an external 38.88 MHz TTL reference. The PLL is
based on a VCO constructed from integrated reactive components, which
form a low-jitter, high-Q differential tank circuit. Both frequency- and
phase-detect circuits reliably acquire and hold lock in worst-case SONET
jitter conditions and scrambling patterns. The lock-detect circuitry signals
when the CDR acquires frequency lock.
Typical SONET/SDH system applications for the TQ8103 include:
Transmission system transport cards
Switch and cross-connect line cards
ATM physical layer interfaces
Test equipment
Add/drop multiplexers
Figure 1. Typical Application
TQ8103
622 Mb/s Clock
& Data Recovery
Features
Single-chip CDR circuit for
622 Mb/s data
Exceeds Bellcore and ITU jitter
tolerance maps
Single-ended ECL input has loop-
through path for external 50 ohm
termination to minimize stubs
and reflections
Clock and data outputs are
differential ECL
Provides complete high-speed
OC-12/STM-4 solution when
used with TQ8101 or TQ8105
Mux/Demux/Framer/PLL
External loop filter requires
simple passive network
Maintains clock in absence of data
28-pin leaded chip carrier
Can be used with a high-speed
external clock
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SINO
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ECL data in
(single-ended)
38.88-MHz TTL
clock oscillator
20K
62
1 mF
50
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10K
1000 pF
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1000 pF
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