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參數(shù)資料
| 型號： | TQ8318 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大小： | 460K |
| 代理商： | TQ8318 |
TQ8318/TQ8319
PRELIMINARY DATA SHEET
3
S
P
T
P
Table 1. TQ8318/19 Pin Descriptions
Signal
Type
Pin Number
Description
DIN
NDIN
CML Input
CML Input
7
8
Serial data input. Internally terminated by 50 Ohms to VTT
Complement of DIN. Internally terminated by 50 Ohms to
VTT
High power differential driver modulated output.
Complement of DOUT. If unused must be terminated in the
same manner as DOUT.
Rise/fall time symmetry adjust control signal input. Input
impedance is typically 10k Ohm.
Output data amplitude adjust control signal input. Input
impedance is typically 10k Ohm.
Output current level reference pin. When driven with an
external current source at exactly 1/5 the output current of
the TQ8318 (1/10 for the TQ8319) level, the voltage at
Vsen10 is equal to that at Vsen1. Can be used to implement a
control loop.
Output current level sensing pin. Vsen1 voltage is directly
proportional to the output current level. Connects internally
to 5 Ohm resistor in differential driver current tail.
Output offset control input
DOUT
NDOUT
High Drive Output
High Drive Output
21
22
VSYMX
Analog Input
1
VLEVEL
Analog Input
2
VSEN10
Analog I/O
13
VSEN1
Analog Output
14
BIAS
Power Pins
Signal
VTT
VDD
GND
VEE
DRIVEGND
NC
Analog Input
25
Description
Input Termination Supply
Pre-drive and I/O VDD Supply
Ground Supply
Output Stage Neg. Supply (-7.5V)
Output Stage Pos. Supply (0V)
Do Not Connect
Pin Number
10
11
3, 6, 9, 12, 26, 15, Package Down Paddle (required)
28, 27, 18, 17
24, 23, 20, 19 (Note: These pins are unused in the TQ8319)
4, 5, 16
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