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| 型號： | TRK-MPC5604P |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 16/104頁 |
| 文件大小： | 0K |
| 描述： | 5604P TTK BD |
| 設(shè)計(jì)資源： | TRK-MPC5604P Component List TRK-MPC5604P Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC56xx |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | MPC5604P |
| 所含物品： | 板，線纜，CD，DVD |
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MPC5604P Microcontroller Data Sheet, Rev. 8
Freescale
19
— Watchpoint triggering, watchpoint triggers program tracing
Auxiliary Output Port
— 4 MDO (Message Data Out) pins
— MCKO (Message Clock Out) pin
—2 MSEO (Message Start/End Out) pins
—EVTO (Event Out) pin
Auxiliary Input Port
—EVTI (Event In) pin
1.5.30
Cyclic redundancy check (CRC)
The CRC computing unit is dedicated to the computation of CRC off-loading the CPU. The CRC module features:
Support for CRC-16-CCITT (x25 protocol):
— x16 + x12 + x5 + 1
Support for CRC-32 (Ethernet protocol):
— x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1
Zero wait states for each write/read operations to the CRC_CFG and CRC_INP registers at the maximum frequency
1.5.31
IEEE 1149.1 JTAG controller
The JTAG controller (JTAGC) block provides the means to test chip functionality and connectivity while remaining transparent
to system logic when not in test mode. All data input to and output from the JTAGC block is communicated in serial format.
The JTAGC block is compliant with the IEEE standard.
The JTAG controller provides the following features:
IEEE Test Access Port (TAP) interface with 4 pins (TDI, TMS, TCK, TDO)
Selectable modes of operation include JTAGC/debug or normal system operation.
A 5-bit instruction register that supports the following IEEE 1149.1-2001 defined instructions:
— BYPASS, IDCODE, EXTEST, SAMPLE, SAMPLE/PRELOAD
A 5-bit instruction register that supports the additional following public instructions:
— ACCESS_AUX_TAP_NPC, ACCESS_AUX_TAP_ONCE
3 test data registers: a bypass register, a boundary scan register, and a device identification register.
A TAP controller state machine that controls the operation of the data registers, instruction register and associated
circuitry.
1.5.32
On-chip voltage regulator (VREG)
The on-chip voltage regulator module provides the following features:
Uses external NPN (negative-positive-negative) transistor
Regulates external 3.3 V /5.0 V down to 1.2 V for the core logic
Low voltage detection on the internal 1.2 V and I/O voltage 3.3 V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TRK-MPC5606B | 制造商:Freescale Semiconductor 功能描述:MPC5606B 144PIN REV 2.1 - Boxed Product (Development Kits) 制造商:Freescale Semiconductor 功能描述:STARTERTRAK DEV BOARD MPC5606B 制造商:Freescale Semiconductor 功能描述:MPC560 QORIVVA STARTER TRAK 制造商:Freescale Semiconductor 功能描述:PRIMARY PLATFORM ((NW)) 制造商:Freescale Semiconductor 功能描述:MPC560, QORIVVA, STARTER TRAK, DEV KIT 制造商:Freescale Semiconductor 功能描述:MPC5606B 144pin 制造商:Freescale Semiconductor 功能描述:EVAL KIT, MPC560B STARTERTRAK AUTO BODY ELECT; Silicon Manufacturer:Freescale; Core Architecture:Power Architecture; Core Sub-Architecture:Power Architecture; Silicon Core Number:MPC5xxx; Silicon Family Name:Qorivva |
| TRK-MPC5606B | 制造商:Freescale Semiconductor 功能描述:PRIMARY PLATFORM ((NW)) |
| TRK-MPC5634M | 功能描述:開發(fā)板和工具包 - 其他處理器 TRAK 5634M 144pn R2.1 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| TRK-USB-MPC5602P | 功能描述:開發(fā)板和工具包 - 其他處理器 STRAKMiniUSB RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| TRK-USB-MPC5604B | 功能描述:開發(fā)板和工具包 - 其他處理器 MiniUSB MPC5604B RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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