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| 型號： | TS3341 |
| 英文描述： | TV Power Schematic |
| 中文描述： | 電視電源原理圖 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 64K |
| 代理商： | TS3341 |
SN74CBTS3306
DUAL FET BUS SWITCH
WITH SCHOTTKY DIODE CLAMPING
SCDS029E – JANUARY 1996 – REVISED NOVEMBER 1998
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
VCC = 5 V
± 0.5 V
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
tpd
A or B
B or A
0.35
0.25
ns
ten
OE
A or B
5.6
1.8
5
ns
tdis
OE
A or B
4.6
1
4.3
ns
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500
500
TEST
tpd
tPLZ/tPZL
tPHZ/tPZH
S1
Open
7 V
0pen
tPLH
tPHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
3 V
0 V
1.5 V
VOH
VOL
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH – 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPHL and tPLH are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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