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參數(shù)資料
| 型號： | TS68020MR20 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CAP 270PF 200V 200V X7R RAD.20 .20X.20 BULK P-MIL-PRF-39014 |
| 中文描述： | 32-BIT, 20 MHz, MICROPROCESSOR, CPGA114 |
| 封裝： | CERAMIC, PGA-114 |
| 文件頁數(shù)： | 23/45頁 |
| 文件大?。?/td> | 1256K |
| 代理商： | TS68020MR20 |
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23
TS68020
2115A–HIREL–07/02
Figure 18.
Data Capacitance Derating Curve
Functional
Description
Description of Registers
As shown in the programming models (Figure 19 and Figure 20) the TS68020 has six-
teen 32-bit general-purpose registers, a 32-bit program counter, two 32-bit supervisor
stack pointers, a 16-bit status register, a 32-bit vector base register, two 3-bit alternate
function code registers, and two 32-bit cache handling (address and control) registers.
Registers D0-D7 are used as data registers for bit and bit field (1- to 32-bit), byte (8-bit),
long word (32-bit), and quad word (64-bit) operations. Registers A0-A6 and the user,
interrupt, and master stack pointers are address registers that may be used as software
stack pointers or base address registers. In addition, the address registers may be used
for word and long word operations. All of the 16 (D0-D7, A0-A7) registers may be used
as index registers.
The status register (Figure 21) contains the interrupt priority mask (three bits) as well as
the condition codes: extend (X), negated (N), zero (Z), overflow (V), and carry (C). Addi-
tional control bits indicate that the processor is in the trace mode (T1 or T0),
supervisor/user state (S), and master/interrupt state (M).
All microprocessors of the TS68000 Family support instruction tracing (via the T0 status
bit in the TS68020) where each instruction executed is followed by a trap to a user-
defined trace routine. The TS68020 adds the capability to trace only the change of flow
instructions (branch, jump, subroutine call and return, etc.) using the T1 status bit.
These features are important for software program development and debug.
The vector base register is used to determine the runtime location of the exception vec-
tor table in memory, hence it supports multiple vector tables so each process or task can
properly manage exceptions independent of each other.
相關(guān)PDF資料 |
PDF描述 |
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| TS68020MR25 | HCMOS 32-bit Virtual Memory Microprocessor |
| TS68020VF120 | T1/E1 Transformer |
| TS68020VF16 | 2 Lines (2 x 1) |
| TS68020VF25 | T1/E1 Transformer |
| TS68020VR20 | DC-DC Converter; Supply Voltage:48V; Output Voltage:12V; Number of Outputs:1; Power Rating:350W; Mounting Type:PC Board; Efficiency:94%; External Depth:2.40"; External Height:0.50"; External Width:2.28"; Isolation Voltage:1500V RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS68020MR25 | 功能描述:IC MPU 32BIT 25MHZ 114PGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點:全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤 |
| TS68020MRB/C16 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:HCMOS 32-bit Virtual Memory Microprocessor |
| TS68020MRB/C20 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:HCMOS 32-bit Virtual Memory Microprocessor |
| TS68020MRB/C25 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:HCMOS 32-bit Virtual Memory Microprocessor |
| TS68020VF120 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:HCMOS 32-bit Virtual Memory Microprocessor |
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