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參數(shù)資料
| 型號： | TS68HC901CFN5 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | HCMOS MULTI-FUNCTION PERIPHERAL |
| 中文描述： | HCMOS多功能外設(shè) |
| 文件頁數(shù)： | 27/42頁 |
| 文件大?。?/td> | 369K |
| 代理商： | TS68HC901CFN5 |
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CLEARED : MPU writes a zero
RE
Receiver Enable. Whenthis bit is a zero,
the receiverwillbeimmediatelydisabled.
All flags will be cleared. When this bit is
a one, normal receiver operation is en-
abled. This bit should no be set to a one
until thereceiver clock is active.
SET : MPU writes a one or Transmitter is disabled in
auto-turnaround mode
CLEARED : MPU writes a zero
TRANSMITTER
The transmit buffer is loaded by writing to the U-
SART data register (UDR). The data word will be
transferred toan internal 8-bit shiftregisterwhenthe
last word in the shift register has been transmitted.
This will produce a buffer empty condition. If the
transmitter completes the transmission of word in
theshift register before a new word is written to the
transmit buffer, an underrun error will occur. In the
asynchronous character format, the transmitter will
send amark untilthe transmit buffer iswritten. Inthe
synchronous character format, the transmitter will
continuously send the synchronous character.
The transmit buffer can be loaded prior to enabling
the transmitter. After the transmitter is enabled,
there is a delay before thefirst bit is output. The se-
rial output line (SO) should be programmed to be
high, low, or high impedance when the transmitter
isenabled to forcetheoutput linetothedesired state
until thefirst bit is shifted out. Notethat a one bit will
always be transmitted prior to the word inthe trans-
mit shift register when the transmitter is first en-
abled.
Whenthe transmitter isdisabled, any word currently
being transmitted will continue to completion. How-
ever, anywordinthetransmit bufferwillnotbetrans-
mitted and will remain in the buffer. So, no buffer
empty condition will occur. If the buffer is empty
when the transmitter is disabled, the buffer empty
condition will remain, but no underrun condition will
be generated when the word in transmission is
completed. If no wordis being transmitted when the
transmitterisdisabled,thetransmitterwillstopatthe
next rising edge of theinternal shift clock.
In theasynchronous character format, thetransmit-
ter can be programmed to send a break. The break
will be transmitted once the word currently in the
shift register has been sent. If the shift register is
empty, the break command will be effective imme-
diately. An END interrupt will be generated at every
normal character boundary toaidintimingthe break
transmission. The breakwillcontinue until thebreak
command is cleared.
Any character in the transmit buffer at thestart of a
break will be transmitted when thebreak istermina-
ted. If the transmit buffer is empty at the start of a
break,it may bewritten atanytimeduring thebreak.
If thebuffer is still empty at the end of the break, an
underrun condition will exist.
Disabling the transmitter during a break condition
causes the transmitter to cease transmission of the
break character at the end of the current character.
No end of breakstop bit will be transmitted. Even if
the transmit buffer is empty, no buffer empty condi-
tion will occur nor willan underrun condition occur.
Also, any word in the transmit buffer will remain.
TRANSMITTERINTERRUPT CHANNELS
The USART transmit section is assigned two inter-
rruptchannels. One channel indicatesa bufferemp-
ty condition and the other channel indicates an un-
derrun or end condition. These interrupting condi-
tions correspond to the BE, UE, and END flag bits
of thetransmitter status register (TSR).Theflag bits
willfunction asdescribed below, whether theirasso-
ciated interrupt channel is enabled or disabled.
TRANSMITTERSTATUSREGISTER
The transmitter status register contains various
transmitter error flagsandtransmittercontrolbitsfor
selecting auto-turnaround and loopback mode. The
TSR is shown in Figure 19.
DMA OPERATION
TS68HC901
27/42
相關(guān)PDF資料 |
PDF描述 |
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| TS68HC901CFN8 | HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901CP4 | HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901CP5 | HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901CP8 | HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901 | HCMOS Multi-Function Peripheral(HCMOS多功能外圍) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS68HC901CFN8 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901CP4 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901CP5 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL |
| TS68HC901CP8 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL |
| TS6A | 制造商:YAMAICHI 制造商全稱:Yamaichi Electronics Co., Ltd. 功能描述:Modular Jacks |
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