參數(shù)資料
型號(hào)： TS80C186EC20
元件分類： 微處理器
英文描述： MICROPROCESSOR|16-BIT|CMOS|QFP|100PIN|PLASTIC
中文描述： 微處理器| 16位|的CMOS | QFP封裝| 100引腳|塑料
文件頁(yè)數(shù)： 53/57頁(yè)
文件大?。?/td> 585K
代理商： TS80C186EC20
80C186EC/188EC, 80L186EC/188EC
INSTRUCTION SET SUMMARY
(Continued)
Function
Format
80C186EC
Clock
Cycles
80C188EC
Clock
Cycles
Comments
ARITHMETIC
(Continued)
IMUL
e
Integer multiply (signed):
1 1 1 1 0 1 1 w
mod 1 0 1 r/m
Register-Byte
Register-Word
Memory-Byte
Memory-Word
25–28
34–37
31–34
40–43
25–28
34–37
32–34
40–43
*
IMUL
Integer Immediate multiply
(signed)
0 1 1 0 1 0 s 1
mod reg r/m
data
data if s
e
0
22–25/
29–32
22–25/
29–32
DIV
e
Divide (unsigned):
1 1 1 1 0 1 1 w
mod 1 1 0 r/m
Register-Byte
Register-Word
Memory-Byte
Memory-Word
29
38
35
44
29
38
35
44
*
IDIV
e
Integer divide (signed):
1 1 1 1 0 1 1 w
mod 1 1 1 r/m
Register-Byte
Register-Word
Memory-Byte
Memory-Word
44–52
53–61
50–58
59–67
44–52
53–61
50–58
59–67
*
AAM
e
ASCII adjust for multiply
1 1 0 1 0 1 0 0
0 0 0 0 1 0 1 0
19
19
AAD
e
ASCII adjust for divide
1 1 0 1 0 1 0 1
0 0 0 0 1 0 1 0
15
15
CBW
e
Convert byte to word
1 0 0 1 1 0 0 0
2
2
CWD
e
Convert word to double word
1 0 0 1 1 0 0 1
4
4
LOGIC
Shift/Rotate Instructions:
Register/Memory by 1
1 1 0 1 0 0 0 w
mod TTT r/m
2/15
2/15
Register/Memory by CL
1 1 0 1 0 0 1 w
mod TTT r/m
5
a
n/17
a
n 5
a
n/17
a
n
Register/Memory by Count
1 1 0 0 0 0 0 w
mod TTT r/m
count
5
a
n/17
a
n
5
a
n/17
a
n
TTT Instruction
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
SHL/SAL
1 0 1
1 1 1
ROL
ROR
RCL
RCR
SHR
SAR
AND
e
And:
Reg/memory and register to either
0 0 1 0 0 0 d w
mod reg r/m
3/10
3/10
*
Immediate to register/memory
1 0 0 0 0 0 0 w
mod 1 0 0 r/m
data
data if w
e
1
4/16
4/16
*
Immediate to accumulator
0 0 1 0 0 1 0 w
data
data if w
e
1
3/4
3/4
*
8/16-bit
TEST
e
And function to flags, no result:
Register/memory and register
1 0 0 0 0 1 0 w
mod reg r/m
3/10
3/10
Immediate data and register/memory
1 1 1 1 0 1 1 w
mod 0 0 0 r/m
data
data if w
e
1
4/10
4/10
*
Immediate data and accumulator
1 0 1 0 1 0 0 w
data
data if w
e
1
3/4
3/4
8/16-bit
OR
e
Or:
Reg/memory and register to either
0 0 0 0 1 0 d w
mod reg r/m
3/10
3/10
*
Immediate to register/memory
1 0 0 0 0 0 0 w
mod 0 0 1 r/m
data
data if w
e
1
4/16
4/16
*
Immediate to accumulator
0 0 0 0 1 1 0 w
data
data if w
e
1
3/4
3/4
*
8/16-bit
Shaded areas indicate instructions not available in 8086/8088 microsystems.
NOTE:
*
Clock cycles shown for byte transfers, for word operations, add 4 clock cycles for all memory transfers.
53
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