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參數(shù)資料
| 型號(hào)： | TS80C31X2-LIE |
| 廠商： | Atmel |
| 文件頁數(shù)： | 42/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 8BIT 30/20MHZ 44-VQFP |
| 標(biāo)準(zhǔn)包裝： | 9 |
| 系列： | 80C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 30/20MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲(chǔ)器類型： | ROMless |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-QFP |
| 包裝： | 托盤 |
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9
4428E–8051–02/08
AT/TS80C31X2
7.
Dual Data Pointer Register Ddptr
The additional data pointer can be used to speed up code execution and reduce code size in a
number of ways.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called
DPS = AUXR1/bit0 (See Table 5.) that allows the program code to switch between them (Refer
to Figure 7-1).
Figure 7-1.
Use of Dual Pointer
Reset Value = XXXX XXX0
Not bit addressable
Table 7-1.
AUXR1: Auxiliary Register 1
7
6
5
4
3
2
1
0
-
-3
-
DPS
Bit
Number
Bit
Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
0
DPS
Data Pointer Selection
Clear to select DPTR0.
Set to select DPTR1.
External Data Memory
AUXR1(A2H)
DPS
DPH(83H) DPL(82H)
0
7
DPTR0
DPTR1
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| TS80C31X2-LIEB | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
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