參數(shù)資料
型號(hào): TS80C31X2-VCED
廠商: TEMIC SEMICONDUCTORS
英文描述: 603R REV2.1 HIP3.0 ROHS
中文描述: 8位CMOS微控制器0-60兆赫
文件頁(yè)數(shù): 1/40頁(yè)
文件大?。?/td> 484K
代理商: TS80C31X2-VCED
Rev. A - Mar. 19, 1999
1
Preliminary
TS80C31X2
8-bit CMOS Microcontroller 0-60 MHz
1. Description
TEMIC TS80C31X2 is high performance CMOS and
ROMless versions of the 80C51 CMOS single chip 8-
bit microcontroller.
The TS80C31X2 retains all features of the TEMIC
TSC80C31 with 128 bytes of internal RAM, a 5-source,
4 priority level interrupt system, an on-chip oscilator
and two timer/counters.
In addition, the TS80C31X2 has a dual data pointer, a
more
versatile
serial
multiprocessor communication (EUART) and a X2 speed
improvement mechanism.
channel
that
facilitates
The fully static design of the TS80C31X2 allows to
reduce system power consumption by bringing the clock
frequency down to any value, even DC, without loss of
data.
The TS80C31X2 has 2 software-selectable modes of
reduced
activity
for
further
consumption. In the idle mode the CPU is frozen while
the timers, the serial port and the interrupt system are still
operating. In the power-down mode the RAM is saved
and all other functions are inoperative.
reduction
in
power
2. Features
G
80C31 Compatible
8031 pin and instruction compatible
Four 8-bit I/O ports
Two 16-bit timer/counters
128 bytes scratchpad RAM
G
High-Speed Architecture
40 MHz @ 5V, 30MHz @ 3V
X2 Speed Improvement capability (6 clocks/
machine cycle)
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to
60 MHz @ 5V, 40 MHz @ 3V)
G
Dual Data Pointer
G
Asynchronous port reset
G
Interrupt Structure with
5 Interrupt sources,
4 priority level interrupt system
G
Full duplex Enhanced UART
Framing error detection
Automatic address recognition
G
Power Control modes
Idle mode
Power-down mode
Power-off Flag
G
Once mode (On-chip Emulation)
G
Power supply: 4.5-5.5V, 2.7-5.5V
G
Temperature ranges: Commercial (0 to 70
o
C) and
Industrial (-40 to 85
o
C)
G
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1
(13.9 footprint)
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