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參數(shù)資料
| 型號： | TS80C32X2-ELCR |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 45/83頁 |
| 文件大?。?/td> | 8336K |
| 代理商： | TS80C32X2-ELCR |
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41
8021G–AVR–03/11
ATmega329P/3290P
9.10.6
Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
I/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section ”Digital Input Enable and Sleep Modes” on page 67 for details on
which pins are enabled. If the input buffer is enabled and the input signal is left floating or have
an analog signal level close to V
CC/2, the input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
CC/2 on an input pin can cause significant current even in active mode. Digital
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and
DIDR0). Refer to ”DIDR1 – Digital Input Disable Register 1” on page 212 and ”DIDR0 – Digital
Input Disable Register 0” on page 229 for details.
9.10.7
JTAG Interface and On-chip Debug System
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enter Power down or
Power save sleep mode, the main clock source remains enabled. In these sleep modes, this will
contribute significantly to the total current consumption. There are three alternative ways to
avoid this:
Disable OCDEN Fuse.
Disable JTAGEN Fuse.
Write one to the JTD bit in MCUCR.
The TDO pin is left floating when the JTAG interface is enabled while the JTAG TAP controller is
not shifting data. If the hardware connected to the TDO pin does not pull up the logic level,
power consumption will increase. Note that the TDI pin for the next device in the scan chain con-
tains a pull-up that avoids this problem. Writing the JTD bit in the MCUCR register to one or
leaving the JTAG fuse unprogrammed disables the JTAG interface.
相關PDF資料 |
PDF描述 |
|---|---|
| TS80C31X2-VJBB | 8-BIT, 40 MHz, MICROCONTROLLER, PQCC44 |
| TSC80C31-16KAD | 8-BIT, 16 MHz, MICROCONTROLLER, PDIP40 |
| TSC80C31-40JDB | 8-BIT, 40 MHz, MICROCONTROLLER, PQFP44 |
| TSC80C31-12LFR | 8-BIT, 12 MHz, MICROCONTROLLER, PQFP44 |
| TSC80C31-20LFD | 8-BIT, 20 MHz, MICROCONTROLLER, PQFP44 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TS80C32X2-LCA | 功能描述:IC MCU 8BIT 30/20MHZ 40-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:80C 標準包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設備:POR，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（32K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉換器:- 振蕩器型:內部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| TS80C32X2-LCAB | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C32X2-LCAD | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C32X2-LCAR | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C32X2-LCB | 功能描述:IC MCU 8BIT 30/20MHZ 44-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:80C 標準包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設備:欠壓檢測/復位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉換器:A/D 11x10b 振蕩器型:內部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
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