參數(shù)資料
型號: TS80L186EC-13
元件分類: 16位微控制器
英文描述: 16-Bit Microprocessor
中文描述: 16位微處理器
文件頁數(shù): 33/57頁
文件大?。?/td> 585K
代理商: TS80L186EC-13
80C186EC/188EC, 80L186EC/188EC
AC CharacteristicsD80L186EC13
Symbol
Parameter
Min
Max
Unit
Notes
INPUT CLOCK
13 MHz
T
F
T
C
T
CH
T
CL
T
CR
T
CF
CLKIN Frequency
CLKIN Period
CLKIN High Time
CLKIN Low Time
CLKIN Rise Time
CLKIN Fall Time
0
26
%
%
%
10
10
MHz
ns
ns
ns
ns
ns
1
1
38.5
15
15
1
1
1, 2
1, 2
1, 3
1, 3
OUTPUT CLOCK
T
CD
T
T
PH
T
PL
T
PR
T
PF
CLKIN to CLKOUT Delay
CLKOUT Period
CLKOUT High Time
CLKOUT Low Time
CLKOUT Rise Time
CLKOUT Fall Time
0
20
ns
ns
ns
ns
ns
ns
1, 4
1
1
1
1, 5
1, 5
2
*
TC
(T/2)
a
5
(T/2)
a
5
10
10
(T/2)
b
5
(T/2)
b
5
1
1
OUTPUT DELAYS
T
CHOV1
S2:0, DT/R, BHE, LOCK
3
28
ns
1, 4, 6, 7
T
CHOV2
LCS, UCS, DEN, A19:16, RD, WR, NCS,
WDTOUT, ALE
3
32
ns
1, 4, 6, 8
T
CHOV3
GCS7:0
3
34
ns
1, 4, 6
T
CLOV1
LOCK, RESOUT, HLDA, T0OUT, T1OUT
3
28
ns
1, 4, 6
T
CLOV2
RD, WR, AD15:0 (AD7:0, A15:8), BHE
(RFSH), NCS, INTA, DEN
3
32
ns
1, 4, 6
T
CLOV3
GSC7:0, LCS, UCS
3
34
ns
1, 4, 6
T
CLOV4
S2:0, A19:16
3
37
ns
1, 4, 6
T
CHOF
RD, WR, BHE (RFSH), DT/R, LOCK,
S2:0, A19:16
0
30
ns
1
T
CLOF
DEN, AD15:0 (AD7:0, A15:8)
0
35
ns
1
INPUT REQUIREMENTS
T
CHIS
TEST, NMI, T1IN, T0IN, READY,
CTS1:0, BCLK1:0, P3.4, P3.5
20
ns
1, 9
T
CHIH
TEST, NMI, T1IN, T0IN, READY,
CTS1:0, BCLK1:0, P3.4, P3.5
3
ns
1, 9
T
CLIS
AD15:0 (AD7:0), READY
20
ns
1, 10
T
CLIH
AD15:0 (AD7:0), READY
3
ns
1, 10
T
CLIS
HOLD, RESIN, PEREQ, ERROR, DRQ3:0
20
ns
1, 9
T
CLIH
HOLD, RESIN, REREQ, ERROR, DRQ3:0
3
ns
1, 9
NOTES:
1. See
AC Timing Waveforms
, for waveforms and definition.
2. Measure at V
IH
for high time, V
IL
for low time.
3. Only required to guarantee I
CC
. Maximum limits are bounded by T
C
, T
CH
and T
CL
.
4. Specified for a 50 pF load, see Figure 14 for capacitive derating information.
5. Specified for a 50 pF load, see Figure 15 for rise and fall times outside 50 pF.
33
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