- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3838 > TS87C51RC2-VCA (Atmel)IC MCU 8BIT 32K OTP 40MHZ 40-DIP PDF資料下載
參數(shù)資料
| 型號： | TS87C51RC2-VCA |
| 廠商： | Atmel |
| 文件頁數(shù)： | 82/84頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 8BIT 32K OTP 40MHZ 40-DIP |
| 標(biāo)準(zhǔn)包裝： | 9 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40/30MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 32KB（32K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁當(dāng)前第82頁第83頁第84頁
2007-2012 Microchip Technology Inc.
DS70292G-page 85
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
6.9
Configuration Mismatch Reset
To maintain the integrity of the peripheral pin select
control registers, they are constantly monitored with
shadow registers in hardware. If an unexpected
change in any of the registers occur (such as cell dis-
turbances caused by ESD or other external events), a
configuration mismatch Reset occurs.
The Configuration Mismatch Flag (CM) bit in the Reset
Control register (RCON<9>) is set to indicate the
configuration mismatch Reset. Refer to Section 11.0
“I/O Ports” for more information on the configuration
mismatch Reset.
6.10
Illegal Condition Device Reset
An illegal condition device Reset occurs due to the
following sources:
Illegal Opcode Reset
Uninitialized W Register Reset
Security Reset
The Illegal Opcode or Uninitialized W Access Reset
Flag (IOPUWR) bit in the Reset Control register
(RCON<14>) is set to indicate the illegal condition
device Reset.
6.10.1
ILLEGAL OPCODE RESET
A device Reset is generated if the device attempts to
execute an illegal opcode value that is fetched from
program memory.
The illegal opcode Reset function can prevent the
device from executing program memory sections that
are used to store constant data. To take advantage of
the illegal opcode Reset, use only the lower 16 bits of
each program memory section to store the data values.
The upper 8 bits should be programmed with 0x3F,
which is an illegal opcode value.
6.10.2
UNINITIALIZED W REGISTER
RESET
Any attempts to use the uninitialized W register as an
address pointer will Reset the device. The W register
array (with the exception of W15) is cleared during all
resets and is considered uninitialized until written to.
6.10.3
SECURITY RESET
If a Program Flow Change (PFC) or Vector Flow
Change (VFC) targets a restricted location in a
protected segment (Boot and Secure Segment), that
operation will cause a security Reset.
The PFC occurs when the Program Counter is
reloaded as a result of a Call, Jump, Computed Jump,
Return, Return from Subroutine, or other form of
branch instruction.
The VFC occurs when the Program Counter is
reloaded with an Interrupt or Trap vector.
Refer to Section 27.8 “Code Protection and
CodeGuard Security” for more information on
Security Reset.
6.11
Using the RCON Status Bits
The user application can read the Reset Control
register (RCON) after any device Reset to determine
the cause of the reset.
Table 6-3 provides a summary of the reset flag bit
operation.
TABLE 6-3:
RESET FLAG BIT OPERATION
Note:
The configuration mismatch feature and
associated reset flag is not available on all
devices.
Note:
The status bits in the RCON register
should be cleared after they are read so
that the next RCON register value after a
device Reset will be meaningful.
Flag Bit
Set by:
Cleared by:
TRAPR (RCON<15>)
Trap conflict event
POR, BOR
IOPWR (RCON<14>)
Illegal opcode or uninitialized
W register access or Security Reset
POR, BOR
CM (RCON<9>)
Configuration Mismatch
POR, BOR
EXTR (RCON<7>)
MCLR Reset
POR
SWR (RCON<6>)
RESET instruction
POR, BOR
WDTO (RCON<4>)
WDT time-out
PWRSAV instruction,
CLRWDT instruction, POR, BOR
SLEEP (RCON<3>)
PWRSAV #SLEEP instruction
POR, BOR
IDLE (RCON<2>)
PWRSAV #IDLE instruction
POR, BOR
BOR (RCON<1>)
POR, BOR
—
POR (RCON<0>)
POR
—
Note: All Reset flag bits can be set or cleared by user software.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PIC18F6490-I/PT | IC PIC MCU FLASH 8KX16 64TQFP |
| PIC18F8310-I/PT | IC PIC MCU FLASH 4KX16 80TQFP |
| PIC18LF2420-I/SP | IC MCU FLASH 8KX16 28-DIP |
| PIC16F84A-04I/SO | IC MCU FLASH 1KX14 EE 18SOIC |
| AT89C51RC2-SLRIM | IC MCU FLASH 8051 32K 5V 44-PLCC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS87C51RC2-VCAD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS87C51RC2-VCB | 功能描述:IC MCU 8BIT 32K OTP 40MHZ 44PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
| TS87C51RC2-VCBB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS87C51RC2-VCBD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS87C51RC2-VCBR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。