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參數(shù)資料
| 型號： | TS87C51RD2-VIA |
| 廠商： | Atmel |
| 文件頁數(shù)： | 13/84頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 8BIT 64K OTP 40MHZ 40-DIP |
| 標(biāo)準(zhǔn)包裝： | 9 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40/30MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
DS70292G-page 22
2007-2012 Microchip Technology Inc.
TABLE 2-2:
RESONATOR RECOMMENDATIONS
2.7
Oscillator Value Conditions on
Device Start-up
If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscillator source frequency must be limited
to
≤8 MHz for start-up with the PLL enabled to comply
with device PLL start-up conditions. This means that if
the external oscillator frequency is outside this range,
the application must start-up in the FRC mode first. The
default PLL settings after a POR with an oscillator
frequency outside this range will violate the device
operating speed.
Once the device powers up, the application firmware
can initialize the PLL SFRs, CLKDIV and PLLDBF to a
suitable value, and then perform a clock switch to the
Oscillator + PLL clock source. Note that clock switching
must be enabled in the device Configuration word.
2.8
Configuration of Analog and
Digital Pins During ICSP
Operations
If MPLAB ICD 3 or REAL ICE is selected as a debug-
ger, it automatically initializes all of the analog-to-digital
input pins (ANx) as “digital” pins, by setting all bits in the
AD1PCFGL register.
The bits in this register that correspond to the
analog-to-digital pins that are initialized by MPLAB ICD
3 or REAL ICE, must not be cleared by the user
application firmware; otherwise, communication errors
will result between the debugger and the device.
If your application needs to use certain analog-to-digital
pins as analog input pins during the debug session, the
user application must clear the corresponding bits in
the AD1PCFGL register during initialization of the ADC
module.
When MPLAB ICD 3 or REAL ICE is used as a
programmer, the user application firmware must
correctly configure the AD1PCFGL register. Automatic
initialization of this register is only done during
debugger operation. Failure to correctly configure the
register(s) will result in all analog-to-digital pins being
recognized as analog input pins, resulting in the port
value being read as a logic ‘0’, which may affect user
application functionality.
2.9
Unused I/Os
Unused I/O pins should be configured as outputs and
driven to a logic-low state.
Alternatively, connect a 1k to 10k resistor between VSS
and the unused pin.
Part
Number
Vendor
Freq.
Load
Cap.
Package
Case
Frequency
Tolerance
Mounting
Type
Operating
Temperature
FCR4.0M5T
TDK Corp.
4 MHz
N/A
Radial
±0.5%
TH
-40°C to +85°C
FCR8.0M5
TDK Corp.
8 MHz
N/A
Radial
±0.5%
TH
-40°C to +85°C
HWZT-10.00MD
TDK Corp.
10 MHz
N/A
Radial
±0.5%
TH
-40°C to +85°C
HWZT-20.00MD
TDK Corp.
20 MHz
N/A
Radial
±0.5%
TH
-40°C to +85°C
Legend:
TH = Through Hole
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相關(guān)代理商/技術(shù)參數(shù) |
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| TS87C51RD2-VIAD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS87C51RD2-VIB | 功能描述:IC MCU 8BIT 64K OTP 40MHZ 44PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
| TS87C51RD2-VIBB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS87C51RD2-VIBD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS87C51RD2-VIBR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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