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| 型號： | TS87C52X2-MIKB |
| 英文描述： | RCD, 100A 4 POLERCD, 100A 4 POLE; Current rating:100A; Current, tripping:30mA; Poles, No. of:4 |
| 中文描述： | 8位CMOS微控制器0-60兆赫 |
| 文件頁數(shù)： | 25/54頁 |
| 文件大?。?/td> | 626K |
| 代理商： | TS87C52X2-MIKB |
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Rev. B - Jan. 25, 1999
25
Preliminary
TS80C52X2
Table 10. Priority Level Bit Values
A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-priority interrupt.
A high-priority interrupt can’t be interrupted by any other interrupt source.
If two interrupt requests of different priority levels are received simultaneously, the request of higher priority level
is serviced. If interrupt requests of the same priority level are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority structure determined
by the polling sequence.
Table 11. IE Register
IE - Interrupt Enable Register (A8h)
7
Reset Value = 0X00 0000b
Bit addressable
IPH.x
IP.x
Interrupt Level Priority
0
0
0 (Lowest)
0
1
1
1
0
2
1
1
3 (Highest)
6
5
4
3
2
1
0
EA
-
ET2
ES
ET1
EX1
ET0
EX0
Bit
Number
Bit
Mnemonic
Description
7
EA
Enable All interrupt bit
Clear to disable all interrupts.
Set to enable all interrupts.
If EA=1, each interrupt source is individually enabled or disabled by setting or clearing its own interrupt
enable bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
ET2
Timer 2 overflow interrupt Enable bit
Clear to disable timer 2 overflow interrupt.
Set to enable timer 2 overflow interrupt.
4
ES
Serial port Enable bit
Clear to disable serial port interrupt.
Set to enable serial port interrupt.
3
ET1
Timer 1 overflow interrupt Enable bit
Clear to disable timer 1 overflow interrupt.
Set to enable timer 1 overflow interrupt.
2
EX1
External interrupt 1 Enable bit
Clear to disable external interrupt 1.
Set to enable external interrupt 1.
1
ET0
Timer 0 overflow interrupt Enable bit
Clear to disable timer 0 overflow interrupt.
Set to enable timer 0 overflow interrupt.
0
EX0
External interrupt 0 Enable bit
Clear to disable external interrupt 0.
Set to enable external interrupt 0.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TS87C52X2-MIKD | RCBO, SP, 10A, 0.1A, TYPE-C; Current rating:10A; Sensitivity:100 mA; Tripping characteristic:Type C RoHS Compliant: Yes |
| TS87C52X2-MIKR | 8-bit CMOS Microcontroller 0-60 MHz |
| TS87C52X2-MIJB | 8-bit CMOS Microcontroller 0-60 MHz |
| TS87C52X2-MIJD | 8-bit CMOS Microcontroller 0-60 MHz |
| TS87C52X2-MIJR | 8-bit CMOS Microcontroller 0-60 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS87C52X2-MIKD | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
| TS87C52X2-MIKR | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
| TS87C52X2-SLSUM | 制造商:Atmel Corporation 功能描述:MCU 8BIT TS87 CISC 8KB EPROM 44PLCC - Rail/Tube |
| TS87C52X2-VCA | 功能描述:IC MCU 8BIT 8K OTP 40MHZ 40-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 標(biāo)準(zhǔn)包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設(shè)備:POR，WDT 輸入/輸出數(shù):32 程序存儲器容量:32KB（32K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| TS87C52X2-VCAB | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
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